summaryrefslogtreecommitdiff
path: root/src/mainboard/iwave/iWRainbowG6
AgeCommit message (Expand)Author
2012-10-26iwave/iWRainbowG6: use 16bit access for a register which is not 32bit alignedSebastian Andrzej Siewior
2012-10-26iwave/iWRainbowG6: remove USE_DCACHE_RAMSebastian Andrzej Siewior
2012-10-08hpet: common ACPI generationPatrick Georgi
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-07-26Drop mainboard chip.hStefan Reinauer
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-03-08Unify Local APIC address definitionsPatrick Georgi
2012-02-22ACPI: More ../../.. removalPatrick Georgi
2012-02-17intel/sch: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2011-10-13Use default table creator macro for all SSDTsStefan Reinauer
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
2011-10-13mptable: Refactor lintsrc generationPatrick Georgi
2011-09-21Use ACPI text fields consistently with all other boardsStefan Reinauer
2011-08-26Add automatic SMBIOS table generationSven Schnelle
2011-06-07SMM: add defines for APM_CNT registerSven Schnelle
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
2011-04-22The UART divider should be calculated based on the base frequencyStefan Reinauer
2011-04-20run uart_init() from console_init, just like the other console initialization...Stefan Reinauer
2011-01-27oops. this is weird. CAR addresses should be specified in the socket and not inStefan Reinauer
2010-12-18Fix a few whitespace and coding style issues.Uwe Hermann
2010-12-18A couple of Poulsbo fixes:Patrick Georgi
2010-12-18Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 boardPatrick Georgi