coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2024-02-18	mb/inventec to mb/ocp: Add SPDX license headers to Kconfig files	Martin Roth
	Change-Id: Ib1bbf22480783f63fc2d729b94251e755d2f1720 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80593 Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-07-20	mb/inventec: Add Intel SPR server board Inventec Transformers	Annie Chen
	CPU: - 2 SPR sockets - 64 total PCIe 5.0 lanes with up to 64 lanes of Flex Bus/CXL per CPU - Up to 32 DDR5 DIMM - 1 Gbase-T NIC port - 1 USB3.0 type A, 1 USB2.0 connector - 1 VGA connector BMC: - ASPEED AST2600 BMC - 1 DDR4 8Gb memory - 1 8GB eMMC Test: The board boots to Linux 4.19.6 with all 192 cores available. Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Signed-off-by: Annie Chen <Chen.AnnieET@inventec.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Wei Chen <Chen.HW@inventec.com> Reviewed-by: Annie Chen <chen.annieet@inventec.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>