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path: root/src/mainboard/intel
AgeCommit message (Expand)Author
2013-03-14graysreef: update platform informationAaron Durbin
2013-03-14basking ridge: update gpio, spd addresses, and OCAaron Durbin
2013-03-14haswell: notes and updates.Aaron Durbin
2013-03-14haswell: align pei_data structure with intel-frameworkAaron Durbin
2013-03-14Mainboard: Add support for Grays ReefAaron Durbin
2013-03-13Eagleheights DSDT: Grant OS control through OSCMike Loptien
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28CBMEM: always initialize early if the board supports itStefan Reinauer
2013-02-27Mainboard SMI S state handler was using the wrong definesMarc Jones
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2013-02-09romcc: Use default romcc flags for most boardsPatrick Georgi
2013-02-04Use tabs instead of spaces to align comments in DSTD headerPaul Menzel
2013-02-04Intel based boards: Use tab instead of spaces to align comment in DSDTPaul Menzel
2013-01-03Rename mainboard_smi.c to smihandler.cPatrick Georgi
2012-11-29Drop empty mainboard.cKyösti Mälkki
2012-11-29Drop empty mainboard_opsKyösti Mälkki
2012-11-24Remove duplicate VGA BIOS interrupt handlersPatrick Georgi
2012-11-24yabel: Use X86_* instead of the more verbose M.x86.REG_*Patrick Georgi
2012-11-24x86 realmode: Use x86emu register file + definesPatrick Georgi
2012-11-24x86 realmode: Adapt to x86emu/YABEL style return codesPatrick Georgi
2012-11-16Fix PIRQ routing abstractionStefan Reinauer
2012-11-16Fix Kconfig GENERATE_*_TABLE usageStefan Reinauer
2012-11-16Drop Kconfig variable BOARD_HAS_HARD_RESETStefan Reinauer
2012-11-16Drop unneeded BOARD_HAS_FADT optionStefan Reinauer
2012-11-16Reduce number of per-mainboard changesStefan Reinauer
2012-11-14Move HAVE_SMI_HANDLER from mainboards to chipsetsStefan Reinauer
2012-11-14SMM: Save the GNVS pointer when creating APCI tablesDuncan Laurie
2012-11-14SMM: Avoid use of global variables in SMI handlerDuncan Laurie
2012-11-13Make EmeraldLake2 work againDuncan Laurie
2012-11-12ACPI: Zero pstate/cstate control values in FADTDuncan Laurie
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
2012-11-06intel/socket_BGA956: enable speedstep, CAR, MMX, SSEPatrick Georgi
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-10-08hpet: common ACPI generationPatrick Georgi
2012-10-05Use mainboard_interrupt_handlers everywherePatrick Georgi
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-08Drop HAVE_MAINBOARD_RESOURCESKyösti Mälkki
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-07-26Drop mainboard chip.hStefan Reinauer
2012-07-26Remove copies of rtl8168.cPatrick Georgi
2012-07-24ChromeOS: Remove board specific acpi_get_vdat_info()Stefan Reinauer
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Remove CMOS Extended range enable from romstageDuncan Laurie
2012-07-24Move GGL0001 ACPI code to generic ChromeOS codeStefan Reinauer
2012-05-26Move subsystem IDs to devicetree.cbStefan Reinauer
2012-05-08Clean up #ifsPatrick Georgi
2012-05-03Don't pre-enable SATA AHCI in romstage.cStefan Reinauer
2012-05-02ChromeOS: drop unused debug header descriptionStefan Reinauer
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
2012-05-01Clean up Emerald Lake 2 mainboard directoryGabe Black
2012-05-01Allow more CPU cores on Emerald Lake 2 CRBStefan Reinauer
2012-05-01Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.Gabe Black
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-05-01Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.Gabe Black
2012-04-30Add support for Intel Emerald Lake 2 CRBStefan Reinauer
2012-04-27Move top level pc80 directory to drivers/Stefan Reinauer
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-15cmos.layout: Remove invalid warningVikram Narayanan
2012-03-16Intel northbridge I945: Apply un-written naming rulesKyösti Mälkki
2012-03-08Unify Local APIC address definitionsPatrick Georgi
2012-02-24Ati video: Apply un-written naming rulesKyösti Mälkki
2012-02-22ACPI: More ../../.. removalPatrick Georgi
2012-02-17intel/i82801cx: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-17intel/i82801ex: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-10Intel cpus: apply un-written naming rulesKyösti Mälkki
2012-01-31northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig optionPeter Stuge
2011-12-02i3100: Add HAVE_HARD_RESETSven Schnelle
2011-10-30remove usbdebug.h include from mainboard/romstage codeSven Schnelle
2011-10-28Get rid of the old romstage-as-bootblock ROM layoutPatrick Georgi
2011-10-13Use default table creator macro for all SSDTsStefan Reinauer
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
2011-10-13mptable: Refactor lintsrc generationPatrick Georgi
2011-09-21Use ACPI text fields consistently with all other boardsStefan Reinauer
2011-08-26Add automatic SMBIOS table generationSven Schnelle
2011-06-15Remove old ACPI codeSven Schnelle
2011-06-15i82801gx: replace cafed00d/cafebabe by definesSven Schnelle
2011-06-07SMM: add defines for APM_CNT registerSven Schnelle
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
2011-04-20run uart_init() from console_init, just like the other console initialization...Stefan Reinauer
2011-04-18* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that valueStefan Reinauer
2011-04-15fix mainboards that were including earlymtrr.c without actually using it.Stefan Reinauer
2011-03-01Use subsystem id from devicetree.cb instead of Kconfig and moveSven Schnelle
2011-02-21[i945] Add SPD adress mappingSven Schnelle
2010-12-16Get mptable OEM/product ID from kconfig variables.Uwe Hermann
2010-12-13Compile cbmem.c instead of including it in romstage,Rudolf Marek
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
2010-12-08first round name simplification. drop the <component>_ prefix.stepan
2010-12-07Get rid of some unneeded function prototypes in romstage.c files.Uwe Hermann
2010-11-22Drop per-board ram_check() calls for now.Uwe Hermann
2010-11-22Final set of smp_write_bus -> mptable_write_buses changes.Patrick Georgi
2010-11-21Simplify a few code chunks, fix whitespace and indentation.Uwe Hermann
2010-11-21Drop excessive whitespace randomly sprinkled in romstage.c files.Uwe Hermann
2010-11-21Convert more boards to use mptable_write_buses.Patrick Georgi
2010-11-21Use DIMM0 et al in lots more places instead of hardocding values.Uwe Hermann
2010-11-20Some more DIMM0 related cleanups and deduplication.Uwe Hermann
2010-11-20Unify DIMM SPD addressing. For Geode, change thePatrick Georgi