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2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-19Move smi trap sample to documentation, don't keep it in every mobo.Vladimir Serbinenko
Sample code belongs to documentation, not copied 100x over prodcution code. Change-Id: I6bb318d76057d02bd6ac5641d12d56ab6d60b745 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10229 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-04wtm2: Convert to use soc/intel/broadwellDuncan Laurie
Convert wtm2 board to use the broadwell soc chipset. BUG=chrome-os-partner:28234 TEST=Build and boot on wtm2 with haswell and broadwell CQ-DEPEND=CL:201067 CQ-DEPEND=CL:*164226 Original-Change-Id: Ifb0db15cc23a3b66430b32b2ad3f8ab2fb03c4c3 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/201070 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit e1073c6e34ab2d436faf46dde5f6b3bf99692866) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I925b91a8de980b1768f03eaee915a7fd91fbdbda Reviewed-on: http://review.coreboot.org/8001 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-05-08ChromeOS boards: Always build code for bootmode strapsKyösti Mälkki
Leave it under BOOTMODE_STRAPS to control whether these have any functional meaning on the build. Change-Id: Ieb59aa7ab4b1e8da6a1002e7a8e5462eb7988d35 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5643 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-07-09fox_wtm2: First step support for coreboot-based graphics startupRonald G. Minnich
This code is the initial version of FUI for haswell and wtm2. The code is simplified from before in many ways. I've gotten rid of the opcode table, because it obscured meaning and I don't think it is needed any more. Register sets, mainly used for reset, are just lines of code -- not many of them. There are a bunch of not-yet-documented registers here; the VBIOS seemed to think they were necessary and testing shows they seem to be right. As a bit of added paranoia, we always include the VBIOS code as our emergency recovery path. You have to run it now anyways, so this is no regression from our current situation; and, if all goes well, in a week (or so), you'll never have to run it again, but like the Force and nose hair, it will be with you always. The code can return in three ways. The first, best way is success: panel is up and the VBIOS need not run. The second mode is that we tried to light up the panel but could not, for some reason, but will return with the panel partly up. In this case, it's ok not to power cycle the panel. The third, worst case, which will NEVER happen, ha ha, is that we have to turn the panel off and wait the required 600ms for it to cycle. Life sucks sometimes. This failure mode is in the 'hang on we're going to fix it' category now that we have ramstage in RW. The Big Goal here is to create something other coreboot ports can use as well. The guys doing the x60 report that the link FUI works, without too many mods, on that chipset, so it seems Intel is keeping things from changing too much over time. Also, again, please note: this and the next 3 versions will ALWAYS fail. The goal is to verify the correctness of the recovery path. The bizarre tab-space formatting in drm_dp_helper.h is from the original, as in i915_reg.h Change-Id: I6ecf454633029d185c29d470980b5a0f3114a8ce Signed-off-by: Ronald G. Minnich <rminnich@google.com> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3635 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-09FOX_WTM2: First pass at FUI.Ronald G. Minnich
This lights up the display. We don't get graphics but we are missing the gttsetup at this point, so that is no shock. The real shock is that anything works at all. Change-Id: I03fc470334e96878aeb8465044b3cc9c90378735 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3634 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-03-18Add Intel Whitetip Mountain 2 mainboardDuncan Laurie
This is mostly a copy of Whitetip Mountain 1 with specific GPIO map for this Customer Reference Board (CRB). This mainboard currently has basic funcionality and is able to boot a Linux Kernel but many of the new Haswell ULT specific devices are not yet enabled. Change-Id: I999452d86f00a2c245fa39b1b76080f6a3b1e352 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2725 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>