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path: root/src/mainboard/intel/tglrvp/variants
AgeCommit message (Expand)Author
2020-09-06mb/*: devicetree: drop now unneeded USBx_PORT_EMPTYMichael Niewöhner
2020-08-21mb/intel/tglrvp: Disable TBT_PCIE3 for UP4John Zhao
2020-08-13mb/intel/tglrvp: Set gpio GPP_H1 for soundcard detectionShaunak Saha
2020-08-12mb/intel/tglrvp: Add interrupt _CRS under CREC scopeJohn Zhao
2020-08-10mb/tgl: Enable SaGv for TGL-UP3 RVPShreesh Chhabbi
2020-08-04mb/**/{devicetree,overridetree}.cb: Indent with tabsAngel Pons
2020-07-29mb/intel/tglrvp: Update TCSS D3Hot and D3Cold configurationJohn Zhao
2020-07-29mb/intel/tglrvp: Add support for USB Type-C connector device propertiesJohn Zhao
2020-07-28mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up4John Zhao
2020-07-14src: Remove unused 'include <stdint.h>Elyes HAOUAS
2020-07-12mb/intel/tglrvp: Add EC_HOST_EVENT_USB_MUX for tglrvpJohn Zhao
2020-07-12mb/intel/tglrvp: Enable s0ix for tglrvp up3 and up4John Zhao
2020-07-12mb/intel/tglrvp: Enable CpuReplacementCheckJamie Ryu
2020-07-09mainboard/intel/tglrvp: Remove unused PrmrrSize chip configSubrata Banik
2020-07-07mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up3John Zhao
2020-06-06mb/intel/tglrvp: Add support for RT 1308Shaunak Saha
2020-06-02mb/intel/tglrvp: Enable TCSS xHCI, PCIe root ports and DMA controllersJohn Zhao
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-26mb/intel/tglrvp: Enable D3HotEnable and D3ColdEnable for tglrvpJohn Zhao
2020-05-20soc/intel/tigerlake: Move PMC PCI resources under PMC deviceTim Wawrzynczak
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-04-20soc/intel/tigerlake: Update iDisp Link UPD settingsSrinidhi N Kaushik
2020-04-20mb/tglrvp: Configure intel common configWonkyu Kim
2020-04-14mb/intel/tglrvp : Enable RP LTRWonkyu Kim
2020-04-10src/mb: Remove unneeded spaces before/after tabsElyes HAOUAS
2020-04-06mainboard/intel: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-03-30tgl boards: Configure retimer Aux orientationBrandon Breitenstein
2020-03-30mb/tglrvp: Add GPE configurationShaunak Saha
2020-03-23mb/tglrvp: Update Audio AIC settings for Tiger LakeSrinidhi N Kaushik
2020-03-18mainboard/[g-p]*: Remove copyright noticesPatrick Georgi
2020-03-16mb/intel/tglrvp: Enable ISH driver and register firmware nameli feng
2020-03-15mb/intel/tglrvp: Enable CNVi in devicetree for Tiger Lake UP3Srinidhi N Kaushik
2020-03-14mb/intel/tglrvp: Update GPIO settingWonkyu Kim
2020-03-11mb/intel/tglrvp: Enable Hybrid storage modeWonkyu Kim
2020-03-11mb/intel/tglrvp: sync up variant folders with latest up3Wonkyu Kim
2020-03-10mb/intel/tglrvp: add CNVi ASL entry for dynamic SSDT generationSrinidhi N Kaushik
2020-03-09mb/intel/tglrvp: Add memory config for Tiger Lake UP4Srinidhi N Kaushik
2020-03-09mb/intel/tglrvp: Add TGL UP4 RVPWonkyu Kim
2020-03-07mb/intel/tglrvp: Add pin mux for CameraWonkyu Kim
2020-03-07mb/intel/tglrvp: Update display ports for RVPWonkyu Kim
2020-03-06mb/intel/tglrvp: Enable Audio AIC with Max98373 & ALC5682 on TGLSrinidhi N Kaushik
2020-02-26mb/intel/tglrvp: add Tiger Lake memory initialization supportSrinidhi N Kaushik
2020-02-05mb/intel/tglrvp: pin mux for ISHWonkyu Kim
2020-01-29mb/intel/tglrvp: pin mux for image clocksWonkyu Kim
2020-01-28mb/intel/tglrvp: Enable DP ports for TGLRVPWonkyu Kim
2020-01-27mb/intel/tglrvp: Enable MIPI cameraWonkyu Kim
2020-01-25mb/intel/tglrvp: Enable rp11 for optaneWonkyu Kim
2020-01-25soc/intel/tigerlake: Fix GPIO communitiesShaunak Saha
2020-01-24mb/intel/tglrvp: Enable SATAWonkyu Kim
2020-01-18mb/intel/tglrvp: Update tglrvp_up3 devicetreeRavi Sarawadi
2020-01-17mb/tglrvp: update gpio pin mux for NVMeWonkyu Kim
2020-01-14mb/intel/tglrvp: Add initial mainboard codeRavi Sarawadi