coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-06	mb: remove duplicated Make code for spd.bin generation	Michael Niewöhner
2020-08-31	mainboard/intel/tigerlake: Update SPD files for TGL-UP3 RVP	Shreesh Chhabbi
2020-08-17	mb/tglrvp: Update SPD files for Hynix	Anil Kumar
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-04-14	mb/intel/{jasperlake_rvp, tglrvp}: Remove unused files	Subrata Banik
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-02-26	mb/intel/tglrvp: add Tiger Lake memory initialization support	Srinidhi N Kaushik
2020-01-14	mb/intel/tglrvp: Add initial mainboard code	Ravi Sarawadi