| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-08-31 | mainboard/intel/tigerlake: Update SPD files for TGL-UP3 RVP | Shreesh Chhabbi |
| 2020-02-26 | mb/intel/tglrvp: add Tiger Lake memory initialization support | Srinidhi N Kaushik |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |