| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-07-21 | Skylake: Only support UART2 as debug port, clean up the rest | Naveen Krishna Chatradhi |
| 2015-07-21 | Sklrvp: Select PCIEXP_L1_SUB_STATE config symbol | Naveen Krishna Chatradhi |
| 2015-07-17 | mainboard/intel: Add Skylake based RVP3 board | Lee Leahy |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |