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path: root/src/mainboard/intel/saddlebrook/cmos.default
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2024-02-18mb/*: Add SPDX headers for cmos.default filesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ib7beed7218f317bc2352b65a6191ef1cdaa0742d Reviewed-on: https://review.coreboot.org/c/coreboot/+/80597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2018-08-15mb/*/*/cmos.default: Decrease debug_level to 'Debug'Elyes HAOUAS
Used default console log level is 7 in src/console/Kconfig. So let cmos.default use the same level as default. Change-Id: Ia39ee457a8985142f6e7a674532995b11cb52198 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2017-12-19mainboard/intel/saddlebrook: add support for Saddle BrookTeo Boon Tiong
Add initial files to support the Saddle Brook board. This board uses the Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file. Most of the code has been taken carried over from kunimitsu with changes done for Saddle Brook. Saddle Brook is a reference board for Skylake SOC and has DDR4. TEST=Build with uefi payload and boot to Linux 4.9 on CRB successfully. Change-Id: Ie221eb58e8ab8ff15e9ef19c1d145a5eb2921b4e Signed-off-by: Anuj Mittal <anujx.mittal@intel.com> Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com> Reviewed-on: https://review.coreboot.org/21436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>