coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-18	mainboard///Kconfig*: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2019-11-01	mb/intel/saddlebrook: Select coreboot MP init	Praveen Hodagatta Pranesh
2019-10-26	soc/intel/skylake: drop support for FSP 1.1	Michael Niewöhner
2019-10-26	mb/intel/saddlebrook: Enable serial port on SIO	Praveen Hodagatta Pranesh
2019-10-26	mb/intel/saddlebrook: migrate to FSP 2.0	Michael Niewöhner
2019-06-21	soc/intel/skylake: Clean up Kconfig	Arthur Heymans
2019-03-24	soc/intel/common: Remove common chip config use_fsp_mp_init	Subrata Banik
2019-03-01	soc/intel/skylake: Unify serial IRQ options	Nico Huber
2019-01-25	sb/intel/common: Show "Add gigabit ethernet firmware" only for boards that ne...	Jan Tatje
2019-01-11	soc/mainboard: Update mainboard UART Kconfig	Lijian Zhao
2019-01-03	mb/intel/{kblrvp,kunimitsu,saddlebrook}: Remove duplicated HAVE_SMI_HANDLER	Elyes HAOUAS
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
2018-08-20	soc/intel/common/block: Move common uart function to block/uart	Subrata Banik
2017-12-19	mainboard/intel/saddlebrook: add support for Saddle Brook	Teo Boon Tiong