| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-01-30 | mb/intel/mtlrvp: Add romstage and configure LP5 memory parts | Ashish Kumar Mishra |
| 2023-01-04 | mb/intel/mtlrvp: Enable CSE Lite SKU for MTL-RVP | Harsha B R |
| 2022-12-29 | mb/intel/mtlrvp: Add configuration for UART devices | Harsha B R |
| 2022-12-21 | mb/intel/mtlrvp: Enable ChromeOS build for mtlrvp | Harsha B R |
| 2022-12-20 | mb/intel/mtlrvp: Enable EC for mtlrvp | Jamie Ryu |
| 2022-12-09 | mb/intel/mtlrvp: Add initial code for mtlrvp_p_ext_ec variant board | Harsha B R |
| 2022-11-27 | mb/intel/mtlrvp: Create baseboard structure for mtlrvp | Harsha B R |
| 2022-11-08 | mb/intel/mtlrvp: Enable ACPI and add ACPI table | Jamie Ryu |
| 2022-11-07 | mb/intel/mtlrvp: Add MTL reference mainboard for MTLRVP-P | Jamie Ryu |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |