Age | Commit message (Expand) | Author |
2019-01-09 | soc/intel: Clean mess around UART_DEBUG | Nico Huber |
2018-11-30 | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans |
2018-11-23 | mb: Set coreboot as DSDT's manufacturer model ID | Elyes HAOUAS |
2018-11-21 | ACPI: Fix DSDT's revision field | Elyes HAOUAS |
2018-08-20 | soc/intel/common/block: Move common uart function to block/uart | Subrata Banik |
2018-03-16 | soc/intel/apollolake and mainboards: Use pcie_rp_clkreq_pin array | Furquan Shaikh |
2017-08-15 | soc/intel/common/block: Add LPC Common code and use it for APL | Ravi Sarawadi |
2017-07-24 | Update files with no newline at the end | Martin Roth |
2017-07-24 | Fix files with multiple newlines at the end. | Martin Roth |
2017-04-07 | intel/minnow3: Clean up Kconfig, devicetree and FMAP | Brenton Dong |
2017-02-23 | intel/minnow3: follow up with recent changes in master | Patrick Georgi |
2017-02-22 | intel/minnow3: Implement and configure GPIO tables | Brenton Dong |
2017-02-22 | intel/minnow3: Configure memory properly | Brenton Dong |
2017-02-22 | mainboard/intel: Add MinnowBoard 3 | Brenton Dong |