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path: root/src/mainboard/intel/kunimitsu/smihandler.c
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2019-09-15src/mainboard: Remove not used #include <elog.h>Elyes HAOUAS
Change-Id: I901cb35488e08f58cdf97f3a8d0f5a8d03560f86 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33729 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-15mainboard/google: Fix indirect includesKyösti Mälkki
Change-Id: Ie79702efab519b16cff45ccad61b95e7d8c2fbac Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34854 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2016-07-15mainboards/skylake: use common Chrome EC SMI helpersAaron Durbin
Reduce duplicate code by using the Chrome EC SMI helper functions. BUG=chrome-os-partner:54977 Change-Id: Ie83e93db514aa0e12e71d371d7afab34a70797fd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15689 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-15mainboards: align on using ACPI_Sx definitionsAaron Durbin
The mainboard_smi_sleep() function takes ACPI sleep values of the form S3=3, S4=4, S5=5, etc. All the chipsets ensure that whatever hardware PM1 control register values are used the interface to the mainboard is the same. Move all the SMI handlers in the mainboard directory to not open code the literal values 3 and 5 for ACPI_S3 and ACPI_S5. There were a few notable exceptions where the code was attempting to use the hardware values and not the common translated values. The few users of SLEEP_STATE_X were updated to align with ACPI_SX as those defines are already equal. The removal of SLEEP_STATE_X defines is forthcoming in a subsequent patch. BUG=chrome-os-partner:54977 Change-Id: I76592c9107778cce5995e5af764760453f54dc50 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15664 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-09-17kunimitsu: Remove code to set USB charge behavior on sleepDuncan Laurie
The EC doesn't support these commands so sending them is not working. We have had a default policy of wake on USB for a long time now and this runtime config isn't really needed any longer. BUG=chrome-os-partner:40635 BRANCH=none TEST=emerge-kunimitsu coreboot Change-Id: I547d92b4e852664567792060bf1f7b60976bb9a6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4a929eb9ec422e145006505ea4d5fbd1ef3950be Original-Change-Id: I01e80de65e6e1cdcabb24edb43bc671f5a8aa437 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/298234 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-29intel/kunimitsu: fix SCI handlingWenkai Du
Ported below patch from glados to kunimitsu: glados: Abstract board GPIO configuration in gpio.h Original-change-Id: I3f1754012158dd5c7d5bbd6e07e40850f21af56d Originally-signed-off-by: Duncan Laurie <dlaurie@chromium.org> Originally-reviewed-on: https://chromium-review.googlesource.com/293942 BUG=chrome-os-partner:40828 BRANCH=none TEST=Verify that acpi interrupts are incrementing on kunimitsu. Change-Id: Ifeddb34289b6e62c936cf6c542906d6e7ef96ddd Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: 8ff0dd2dcdf6485f0171fb967f7de3015cf4e4ad Original-Change-Id: I1f270a03a241d2285639f79854d04059d2c2c99f Original-Signed-off-by: Wenkai Du <wenkai.du@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/295048 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Robbie Zhang <robbie.zhang@intel.com> Original-Tested-by: Robbie Zhang <robbie.zhang@intel.com> Reviewed-on: http://review.coreboot.org/11432 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-08-29intel/kunimitsu: clean up ec smi and make EC_SMI_L functionalrobbie zhang
forward port of "glados: make EC_SMI_L functional", commit 50ed38feba58f BUG=None BRANCH=None TEST=Built and booted kunimitsu. CQ-DEPEND=CL:295012 Change-Id: I41daeb8b729f2de117b5d57c460925437460e50a Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: d9308c0b8eb05c756d88dc0c3d761c9e76d07e08 Original-Change-Id: Ia90c70d21af75d0f0da2af2b4437ccf26659a157 Original-Signed-off-by: robbie zhang <robbie.zhang@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/295045 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Wenkai Du <wenkai.du@intel.com> Reviewed-on: http://review.coreboot.org/11428 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-21Kunimitsu: Remove address from copyright noticeLee Leahy
Remove the address from the copyright notices. BRANCH=none BUG=None TEST=Build and run on Kunimitsu Change-Id: Ibe8196841d9e76c9ee3a3dbae802ecc63dc7904c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cc12d2658324a375d02748098f0a2f4b5d1b5615 Original-Change-Id: I81a71e4ad9b8a66ad0e9a93cbeb512d90eb35906 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/286266 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/11008 Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Tested-by: build bot (Jenkins)
2015-07-17mainboard/intel: Add Skylake based Kunimitsu boardLee Leahy
Initial files to support the Kunimitsu board. Matches chromium tree at 927026db This board uses the Skylake FSP 1.1 image and does not build without the FspUpdVpd.h file. BRANCH=none BUG=None TEST=Build and run ChromeOS on kunimitsu Change-Id: I1017a66bc811af51a0921e864b589ce2cb618082 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 01:07:54 +0000