coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-04-01	soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC	Aamir Bohra
2020-03-26	mb/intel/jasperlake_rvp: add display related UPD configs	Ronak Kanabar
2020-03-26	mb/intel/jasperlake_rvp: Correct Kconfig options	Maulik V Vaghela
2020-03-25	mb/intel/jasperlake_rvp: Update FMAP for jslrvp	Meera Ravindranath
2020-03-25	mb/intel/jasperlake_rvp: Add config check for lid switch	Maulik V Vaghela
2020-03-25	mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP	Ronak Kanabar
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-03-07	chromeos: stop sharing write protect GPIO with depthcharge	Joel Kitching
2020-03-02	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	Angel Pons
2020-03-02	mb/**/dsdt.asl: Remove "Some generic macros" comment, again	Angel Pons
2020-02-24	mb/intel/jasperlake_rvp: Disable SATA controller	Usha P
2020-02-17	soc/intel/tigerlake: Enable Audio on TGL	Srinidhi N Kaushik
2020-02-15	mb/intel/jasperlake_rvp: Enable only required PCIE root ports	Usha P
2020-01-25	soc/intel/tigerlake: Fix GPIO communities	Shaunak Saha
2020-01-18	soc/intel/tigerlake: Update chip files	Ravi Sarawadi
2020-01-18	mb/intel/jasperlake_rvp: Remove sd card detect gpio	Maulik V Vaghela
2020-01-09	soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpi	Subrata Banik
2020-01-02	mb/intel/jasperlake_rvp: Add initial mainboard code	Aamir Bohra