summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/emeraldlake2
AgeCommit message (Expand)Author
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
2013-09-21CBMEM: Always have early initialisationKyösti Mälkki
2013-09-21timestamps: Stash early timestamps in CAR_GLOBALKyösti Mälkki
2013-09-21timestamps intel: Move timestamp scratchpad to chipsetKyösti Mälkki
2013-07-31Drop unused EXTERNAL_MRC_BLOBStefan Reinauer
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-03-22Unify coreboot table generationStefan Reinauer
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-02-28CBMEM: always initialize early if the board supports itStefan Reinauer
2013-02-27Mainboard SMI S state handler was using the wrong definesMarc Jones
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2013-02-04Intel based boards: Use tab instead of spaces to align comment in DSDTPaul Menzel
2013-01-03Rename mainboard_smi.c to smihandler.cPatrick Georgi
2012-11-24Remove duplicate VGA BIOS interrupt handlersPatrick Georgi
2012-11-24yabel: Use X86_* instead of the more verbose M.x86.REG_*Patrick Georgi
2012-11-24x86 realmode: Use x86emu register file + definesPatrick Georgi
2012-11-24x86 realmode: Adapt to x86emu/YABEL style return codesPatrick Georgi
2012-11-16Drop unneeded BOARD_HAS_FADT optionStefan Reinauer
2012-11-16Reduce number of per-mainboard changesStefan Reinauer
2012-11-14Move HAVE_SMI_HANDLER from mainboards to chipsetsStefan Reinauer
2012-11-14SMM: Save the GNVS pointer when creating APCI tablesDuncan Laurie
2012-11-14SMM: Avoid use of global variables in SMI handlerDuncan Laurie
2012-11-13Make EmeraldLake2 work againDuncan Laurie
2012-11-12ACPI: Zero pstate/cstate control values in FADTDuncan Laurie
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
2012-10-08hpet: common ACPI generationPatrick Georgi
2012-10-05Use mainboard_interrupt_handlers everywherePatrick Georgi
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-08Drop HAVE_MAINBOARD_RESOURCESKyösti Mälkki
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-07-26Drop mainboard chip.hStefan Reinauer
2012-07-24ChromeOS: Remove board specific acpi_get_vdat_info()Stefan Reinauer
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Remove CMOS Extended range enable from romstageDuncan Laurie
2012-07-24Move GGL0001 ACPI code to generic ChromeOS codeStefan Reinauer
2012-05-26Move subsystem IDs to devicetree.cbStefan Reinauer
2012-05-03Don't pre-enable SATA AHCI in romstage.cStefan Reinauer
2012-05-02ChromeOS: drop unused debug header descriptionStefan Reinauer
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
2012-05-01Clean up Emerald Lake 2 mainboard directoryGabe Black
2012-05-01Allow more CPU cores on Emerald Lake 2 CRBStefan Reinauer
2012-05-01Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.Gabe Black
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-05-01Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.Gabe Black
2012-04-30Add support for Intel Emerald Lake 2 CRBStefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-11 22:52:01 +0000