coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-08-13	src/mb: Update unlicensable files with the CC-PDDC SPDX ID	Martin Roth
2020-11-04	mb/intel/emeraldlake2: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2019-12-31	mb/**/acpi: Remove unused files	Angel Pons
2018-11-30	cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl	Arthur Heymans
2018-10-18	mb: Fix non-local header treated as local	Elyes HAOUAS
2018-06-04	mb/intel: Get rid of whitespace before tab	Elyes HAOUAS
2018-06-03	intel bd82x6x/lynxpoint systems: Update ACPI thermal zone handler	Martin Roth
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-26	bd82x6x: Merge common platform ASL code.	Vladimir Serbinenko
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-23	sandy/ivy/nehalem: Remerge interrupt handling	Vladimir Serbinenko
2014-08-22	Remove dead video.asl	Vladimir Serbinenko
2014-07-17	mainboard,ASL: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2012-07-24	Move GGL0001 ACPI code to generic ChromeOS code	Stefan Reinauer
2012-05-02	ChromeOS: drop unused debug header description	Stefan Reinauer
2012-05-01	Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.	Gabe Black
2012-05-01	Fix Sandybridge/Ivybridge mainboards according to code review	Stefan Reinauer
2012-04-30	Add support for Intel Emerald Lake 2 CRB	Stefan Reinauer