coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-01-27	ACPI: Add top-level ASL	Kyösti Mälkki
2020-10-21	soc/intel,mb/*: get rid of legacy pad macros	Michael Niewöhner
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-10-03	soc/intel/xeon_sp: Use common ASL code for xeon_sp	Marc Jones
2020-09-21	mb/intel: Drop unneeded empty lines	Elyes HAOUAS
2020-08-03	mb/intel/cedarisland: Remove duplicated code	Maxim Polyakov
2020-08-03	mb/intel/cedarisland: Use FSP_M_CONFIG structure to set UPD	Maxim Polyakov
2020-07-26	mb/intel/cedarisland/Makefile: Add missing ramstage.c	Maxim Polyakov
2020-07-25	mb/intel/cedarisland: undo set trig and bufdis for NF pads	Maxim Polyakov
2020-06-19	Kconfig: Escape variable to accommodate new Kconfig versions	Patrick Georgi
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	mb/intel/cedarisland_crb: Enable P2SB device	Andrey Petrov
2020-05-01	mb/intel/cedarisland_crb: Populate 2-socket parameters for FSP-M	Andrey Petrov
2020-04-30	mb/cedarisland_crb: rework GPIOs configuration using macros	Maxim Polyakov
2020-04-30	mb/cedarisland_crb: exclude GPIOs reconfiguration by FSP-M	Maxim Polyakov
2020-04-30	mb/intel/cedarisland_crb: use common driver to configure GPIO	Maxim Polyakov
2020-04-24	mb/intel/cedarisland_crb: Add dummy mainboard_memory_init_params()	Andrey Petrov
2020-03-26	mb/intel/cedarisland_crb: Add Cedar Island CRB	Andrey Petrov