coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-10-20	intel/cannonlake_rvp: Update board name	Lijian Zhao
	Change the board name from cannonlake U DDR4 to U LPDDR4 to match actual platform. TEST=NONE Change-Id: Id350e3cbc299d49431197ef5f914ea9a7310a0a5 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/22112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
2017-07-26	intel/cannonlake_rvp: Split RVP boards and SPD	Lijian Zhao
	Add both Cannonlake U DDR4 RVP and Cannonlake Y LPDDR4 RVP support. Implement SPD entry to FSPM for both platforms, seperated platform specific DQ/DQS/Rcomp input to FSPM as well. Change-Id: If71662353ddba89a9e831503a2d80dd5ebd65de3 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/20503 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-19	mainboard/intel/cannonlake_rvp: Add initial board files	Andrey Petrov
	Initial board files needed to selected to build cannonlake rvp. Change-Id: I82bd5c785e451f02b827765c54d432517afd7de0 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/20075 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>