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2024-07-03soc/intel/xeon_sp/gnr: Add soc_pci_domain_fill_ssdtShuo Liu
Domain device objects are created with HID/CID/UID/_OSC/_PXM Dynamic domain SSDT generation could benefit the support of SoCs with multiple SKUs, or the case where one set of codes supports multiple SoCs. One possible side-effect might be the extra performance cost for generating these tables, which should not bring big impact on high performance server CPUs. GNR codes run with dynamic domain SSDT generation to fit for both GraniteRapids and SierraForest SoCs. TEST=Build on intel/avenuecity CRB TEST=Build on intel/beechnutcity CRB Change-Id: I28bfdf74d8044235f79f67d832860d8b4306670c Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81374 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2024-05-29tree: Remove unused <string.h>Elyes Haouas
Change-Id: I9ed1a82fcd3fc29124ddc406592bd45dc84d4628 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
2024-05-16mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut CityShuo Liu
Beechnut City CRB is the 2 socket reference board for 6th Gen Xeon-SP SP SoCs (Granite Rapids SP and Sierra Forest SP). This patch initially sets the code set up as a compilation target with GNR N-1 FSP, and with basic feature supports (Integrated IO Controller (IIO) configuration, BMC, UART, HPET). TEST=Build on intel/beechnutcity CRB Change-Id: I3f6a0fb97b62baadb438fb9f11fdd78fccb3f89a Signed-off-by: Shuo Liu <shuo.liu@intel.com> Co-authored-by: Gang Chen <gang.c.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>