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This patch enables DPTF support for Intel Amenia
platform, adds the ASL settings specific to Amenia
boards.
BUG=chrome-os-partner:53096
TEST=Verify that the thermal zones are enumerated
under /sys/class/thermal in Amenia board. Navigate to
/sys/class/thermal, and verify that a thermal
zone of type TCPU exists there.
Change-Id: I400e2312a20870058f3a386004fad748d3ee4460
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/15094
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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Use the ACPI generator for creating the Chrome OS gpio
package. Each mainboard has its own list of Chrome OS
gpios that are fed into a helper to generate the ACPI
external OIPG package. Additionally, the common
chromeos.asl is now conditionally included based on
CONFIG_CHROMEOS.
Change-Id: I1d3d951964374a9d43521879d4c265fa513920d2
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15909
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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Update the write protect GPIO reported in ACPI to GPIO_75.
Also update the controller ID to "INT3452:01" which will
point at the goldmont device and includes write protect GPIO.
BUG=none
BRANCH=none
TEST=verify crossystem output for wpsw_cur.
Change-Id: Id6b172e289976072836746c1814e0300544a06cb
Signed-off-by: sselvar2 <susendra.selvaraj@intel.com>
Reviewed-on: https://coreboot.intel.com/7771
Reviewed-by: Sparry, Icarus W <icarus.w.sparry@intel.com>
Reviewed-by: Petrov, Andrey <andrey.petrov@intel.com>
Tested-by: Petrov, Andrey <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15496
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add ACPI NHLT table generation that the current hardware
supports as well select the hardware used on the board.
Amenia has support for two audio codecs, Dialog for
headsets and Maxim for speakers.
Change-Id: Iaba9ec81ffb4f128f2e4413dec5174d9ecb856c9
Signed-off-by: Saurabh Satija <saurabh.satija@intel.com>
Reviewed-on: https://review.coreboot.org/15024
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This patch adds asl code to include support for Google ChromeEC.
We need this to show the battery icon and notifications like charger
connect/disconnect etc.
BUG = 53096
TEST = Plug/Unplug AC Adapter multiple times and make sure the battery
connected is charging properly.
Change-Id: Id908f145789402573ea54fc4f15cf7a0e651ebf4
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/14987
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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Enabled LPC channel between host and EC.
Superio.asl will enable proper probing of onboard keyboard.
Change-Id: I57014fc90b345661853280ae3402f86e56af5fb9
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Signed-off-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-on: https://review.coreboot.org/14468
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add amenia board files
Change-Id: I6731a348b4c0550d3b9381adb5fb83719f90a5da
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/14352
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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