| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-08-10 | mb/intel/adlrvp: create dynamic power limits mechanism for thermal | Sumeet Pawnikar |
| 2021-08-09 | mb/intel/adlrvp: Support VBT binaries for LP4 and LP5 | Bernardo Perez Priego |
| 2021-08-05 | mb/intel/adlrvp: Add probed fw_configs to SMBIOS OEM strings | Anil Kumar |
| 2021-06-14 | mb/intel/adlrvp: Add board id for MR DDR5 SKU | Deepti Deshatty |
| 2021-04-02 | mb/intel/adlrvp: Update VBT filenames | Tim Wawrzynczak |
| 2021-03-15 | mb/intel/adlrvp_p: Support VBT for LP4, LP5 and DDR5 SKUs | Meera Ravindranath |
| 2020-10-14 | mb/intel/adlrvp: Add ADL-P ramstage mainboard code | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |