coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2019-07-19	sb/intel/{bd82x6x\|ibexpeak}: Drop p_cnt_throttling_supported	Patrick Rudolph
	The processor P_BLK doesn't support throttling. This behaviour could be emulated with SMM, but instead just update the FADT to indicate no support for legacy I/O based throttling using P_CNT. We have _PTC defined in SSDT, which should be used in favour of P_CNT by ACPI aware OS, so this change has no effect on modern OS. Drop all occurences of p_cnt_throttling_supported and update autoport to not generate it any more. Change-Id: Iaf82518d5114d6de7cef01dca2d3087eea8ff927 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-06-21	sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree	Arthur Heymans
	Set up generic decode ranges based on the devicetree settings. Change-Id: Ie59b8272c69231d6dffccee30b4d3c84a7e83e8f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33548 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
	With the memory controller the separate sockets becomes a useless distinction. They all used the same code anyway. UNTESTED: This also updates autoport. Change-Id: I044d434a5b8fca75db9eb193c7ffc60f3c78212b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31031 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-23	mb///devicetree.cb: Make sandybridge devicetree uniform	Arthur Heymans
	This is a merely cosmetic change. Change-Id: If36419fbee9628b591116604bf32fe00a4f08c17 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/31030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2018-03-02	mb/hp: Enable additional ports at WWAN slot for Elitebooks	Iru Cai
	2760p: enable PCIe 8470p: enable mSATA 8460p: enable PCIe, also add comments according to circuit diagram 2570p: comment for some USB ports Change-Id: Ib5209f2dfb249fca5bae89bc6da3b704c8e903dd Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/23357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bill XIE <persmule@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2017-12-05	mb/hp/8460p: Add TPM support	Bill XIE
	After applying this change, /dev/tpm0 is visible inside GNU/Linux with kernel 4.9.51-1 from Debian, and there is a menu item shown inside SeaBIOS' (master only) interface if ESC is pressed. The TPM is confirmed working with [Heads](https://github.com/osresearch/heads). Change-Id: I3b845928954d203d1c3608b6704fedbd590e1fa9 Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/22602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-09-02	mb/hp: Enable ExpressCard hotplug in all Elitebooks	Iru Cai
	The MPC.HPCE bit of the ExpressCard root port is not set in vendor firmware, so autoport didn't generate the right pcie_hotplug_map to support ExpressCard hotplug. Also add comments for each PCIe root port. Change-Id: Ic53e36a7192b9bfa8ff9fca57f4556e972e2611b Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/21310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-08-18	mainboard/hp: Add HP Elitebook 8460p	Iru Cai
	The code is based on autoport. I'm using a machine with discrete GPU, and gfx.* in devicetree.cb is from 2760p. It can be debug with serial port on dock. Tested: - CPU and memory: i5-2540M, 4G+0 - Arch Linux (Linux 4.11.7, SeaBIOS payload, with ATOM BIOS extracted from vendor UEFI firmware) - USB ports - SD card reader - WLAN - DP display - S3 Change-Id: I9c42723ba240a2e9b46998c1a8a708aebc66c604 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/20501 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>