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2020-06-02mb/google/{daisy,veyron{_mickey,_rialto}}: Remove unused 'include <vbe.h>'Elyes HAOUAS
Change-Id: I7c0be437e8cb49934913563c6d21056034a50095 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41684 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-06mb/google/veyron_rialto: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: Ib28acdb91c5eb0c06413edfab62d6737932946f2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40201 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2020-03-10src: Remove unneeded 'include <arch/cache.h>'Elyes HAOUAS
Change-Id: I6374bc2d397800d574c7a0cc44079c09394a0673 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37984 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-15src/mainboard: Remove not used #include <elog.h>Elyes HAOUAS
Change-Id: I901cb35488e08f58cdf97f3a8d0f5a8d03560f86 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33729 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-29commonlib: fix typo LB_TAB_* (instead of LB_TAG_*)Patrick Georgi
Also adapt all users of these symbols Change-Id: Ibf924a283d438de49a93ce661b0d9ca1a81cd6d1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32956 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-04-06src: Use include <delay.h> when appropriateElyes HAOUAS
Change-Id: I23bc0191ca8fcd88364e5c08be7c90195019e399 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: David Guckian
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-22symbols.h: Add macro to define memlayout region symbolsJulius Werner
When <symbols.h> was first introduced, it only declared a handful of regions and we didn't expect that too many architectures and platforms would need to add their own later. However, our amount of platforms has greatly expanded since, and with them the need for more special memory regions. The amount of code duplication is starting to get unsightly, and platforms keep defining their own <soc/symbols.h> files that need this as well. This patch adds another macro to cut down the definition boilerplate. Unfortunately, macros cannot define other macros when they're called, so referring to region sizes as _name_size doesn't work anymore. This patch replaces the scheme with REGION_SIZE(name). Not touching the regions in the x86-specific <arch/symbols.h> yet since they don't follow the standard _region/_eregion naming scheme. They can be converted later if desired. Change-Id: I44727d77d1de75882c72a94f29bd7e2c27741dd8 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/31539 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-08mb/google: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I8e549e4222ae2ed6b9c46f81c5b5253e8b227ee8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-22security/vboot: Move vboot2 to security kconfig sectionPhilipp Deppenwiese
This commit just moves the vboot sources into the security directory and fixes kconfig/makefile paths. Fix vboot2 headers Change-Id: Icd87f95640186f7a625242a3937e1dd13347eb60 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/22074 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-18include/device: Split i2c.h into threeNico Huber
Split `i2c.h` into three pieces to ease reuse of the generic defi- nitions. No code is changed. * `i2c.h` - keeps the generic definitions * `i2c_simple.h` - holds the current, limited to one controller driver per board, devicetree independent I2C interface * `i2c_bus.h` - will become the devicetree compatible interface for native I2C (e.g. non-SMBus) controllers Change-Id: I382d45c70f9314588663e1284f264f877469c74d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-28chromeos: Clean up elog handlingFurquan Shaikh
1. Currenty, boot reason is being added to elog only for some ARM32/ARM64 platforms. Change this so that boot reason is logged by default in elog for all devices which have CHROMEOS selected. 2. Add a new option to select ELOG_WATCHDOG_RESET for the devices that want to add details about watchdog reset in elog. This requires a special region WATCHDOG to be present in the memlayout. 3. Remove calls to elog add boot reason and watchdog reset from mainboards. BUG=chrome-os-partner:55639 Change-Id: I91ff5b158cfd2a0749e7fefc498d8659f7e6aa91 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15897 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and developer mode check functions to vboot. Thus, get rid of the BOOTMODE_STRAPS option which controlled these functions under src/lib. BUG=chrome-os-partner:55639 Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15868 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-25google/veyron_rialto: Reduce voltage and frequency in recovery modeDavid Hendricks
This applies CL:300617 to Rialto to down throttle further in recovery mode. BUG=chrome-os-partner:42054 BRANCH=none TEST=Saw print statment in recovery mode with image.serial.bin, device only got mildly warm after several minutes (not hot). Change-Id: I08b6024d31c83c6bbd8c8d9d9a07adc9835e81fd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 74eb9143fbe13df5f386185eab9e5ba9df27cadf Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I9e57d826750cb523c115332fa13a6143bcff7449 Original-Reviewed-on: https://chromium-review.googlesource.com/302631 Reviewed-on: http://review.coreboot.org/12135 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2015-08-28veyron_rialto: remove spurious GPIO assignmentsAlexandru M Stan
GPIO(0, B, 3) and GPIO(7, C, 5) are not actually connected, GPIO(0, B, 4) is named differently. BUG=chrome-os-partner:43031 TEST=Rialto should still boot just fine, USB should still work BRANCH=master Change-Id: I11879385de6e9b57ac28bcae699333beb5a0d64c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: a66bf1fd73ff8d15d4ec1a8f3602465941285c32 Original-Change-Id: Ib7d2baa6ed1ab38db786eb4d5e77316ad72cbfd4 Original-Signed-off-by: Alexandru M Stan <amstan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/294713 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/11400 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-08-28veyron_rialto: Force 3G modem offDavid Hendricks
This basically does the same thing for firmware what CL:290631 did in the kernel. We want to keep the modem off until it needs to be used to avoid enumeration/detection issues. BUG=chrome-os-partner:43271 BRANCH=none TEST=needs testing Change-Id: I3b63a77c732dc4895b728b30f1dd71210a9c0e90 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: a90ccd7fbffe44abe05e96341cc77067442c85e4 Original-Change-Id: I3516de1ea9160f7186ad7f5fb3b5d29ac73143b5 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290890 Original-Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-on: http://review.coreboot.org/11385 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-06veyron_rialto: Use VOP_MODE_NONE for display init.David Hendricks
This uses VOP_MODE_NONE for display init on veyron_rialto and adds a mainboard_power_on_backlight() stub so that we can finally get rid of SKIP_DISPLAY_INIT_HACK. BUG=none BRANCH=none TEST=built for veyron_rialto Change-Id: Ia6b420a962fe266e773c804b8e5c68da35848753 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a290c938c163759a3672c07d8ec7c0a38057b13d Original-Change-Id: Iec2d7f03857198a4d6f7490db1e3e19c74f18c43 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/282048 Reviewed-on: http://review.coreboot.org/10784 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-04-21arm(64): Globally replace writel(v, a) with write32(a, v)Julius Werner
This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-17veyron_{brain,danger,rialto}: Enable eventloggingDavid Hendricks
This brings brain, danger, and rialto up to parity with other veyron platforms as far as eventlog functionality is concerned. BUG=chrome-os-partner:34436 BRANCH=none TEST="mosys eventlog list" shows events (tested on Brain) Change-Id: I186c5d18e5351c0eaf08ffecfd87506283c44b19 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1764bc53147718031231a6d125a4a1a96c4c6a8f Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Ief09299965f6f21bc5a40cef31cde61344025c2a Original-Reviewed-on: https://chromium-review.googlesource.com/239979 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9755 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-15veyron: Add veyron_rialto boardjinkun.hong
Derived from of veyron_brain with new memory configuration. BUG=chrome-os-partner:35072 TEST=built and boot on rialto-rev0 boards. BRANCH=veyron Change-Id: I2c6f74d231e39de76ef2399fdb20efae977b34fa Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 17d66e5f58562427badd6973ebb053f58573c040 Original-Change-Id: I8626ff5da8098ca120481b8cda0c6703f806711e Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com> Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/238946 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Trybot-Ready: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9649 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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