| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-03-07 | google/veyron: add K4B4G1646E-BYK0 ddr with ramid 000Z | Shunqian Zheng |
| 2017-03-07 | google/veyron_*: Add new Micron and Hynix modules | David Hendricks |
| 2016-11-03 | google/veyron*: change .ddrconfig from 14 to 3 | ZhengShunQian |
| 2016-11-03 | google/veyron*: add DDR configs for new samsung DDR | ZhengShunQian |
| 2016-08-01 | Add newlines at the end of all coreboot files | Martin Roth |
| 2016-01-21 | google/veyron_mickey: Update Hynix memory configuration | Lang Zhang |
| 2015-11-20 | google/veyron_mickey: Update LPDDR3 configuration | jiazi Yang |
| 2015-08-28 | veyron: add Nanya NT5CC256M16DP sdram | jinkun.hong |
| 2015-08-28 | veyron: mickey sdram-lpddr3-samsung-2GB.inc enable odt | jinkun.hong |
| 2015-08-28 | veyron: mickey sdram-lpddr3-samsung-2GB.inc now 40 Ohm | Douglas Anderson |
| 2015-07-29 | veyron: update mickey sdram-lpddr3-samsung-2GB.inc | jinkun.hong |
| 2015-06-05 | google/veyron_mickey: Add new mainboard | David Hendricks |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |