| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-12-31 | imgtec/pistachio: disable default RPU gate register values | Ionela Voinescu |
| 2015-12-27 | mainboard/google/urara: change SYS PLL to 700MHz | Ionela Voinescu |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-22 | google/urara: use board ID information to set up hardware | Ionela Voinescu |
| 2015-04-21 | urara: I2C clock and MFIO setup function for all interfaces | Ionela Voinescu |
| 2015-04-21 | pistachio: add clock setup for all I2C interfaces | Ionela Voinescu |
| 2015-04-14 | urara: increase drive strength for SPIM1 MFIOs | Ionela Voinescu |
| 2015-04-14 | urara: setup I2C0 clock and MFIOs | Ionela Voinescu |
| 2015-04-14 | urara: Reduce MIPS PLL jitter | Ionela Voinescu |
| 2015-04-14 | urara: add clock setup for MIPS CPU, ROM and Ethernet | Ionela Voinescu |
| 2015-04-14 | urara: remove call to printk before UART is initialized | Ionela Voinescu |
| 2015-04-14 | urara: Configure clocks and MFIOs | Ionela Voinescu |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |