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path: root/src/mainboard/google/skyrim/Kconfig
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2022-11-02mb/google/skyrim: Select GOOGLE_SMBIOS_MAINBOARD_VERSIONAmanda Huang
Select GOOGLE_SMBIOS_MAINBOARD_VERSION allows querying board revision from the EC. BUG=b:256723358 TEST=1. emerge-skyrim coreboot chromeos-bootimage 2. flash the image to the device and check board rev by using command `dmidecode -t 1 | grep Version` Change-Id: I97295083dbca1c285ef7359d86abac7315c654c9 Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69087 Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-10-28mb/google/skyrim/var/winterhold: Enable DPTC supportEricKY Cheng
Enable DPTC support for Winterhold BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com> Change-Id: I97c2d3ee29687cd8a9c459e90a45cef05ac4436b Reviewed-on: https://review.coreboot.org/c/coreboot/+/68076 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Van Patten <timvp@google.com>
2022-10-27mb/google/skyrim: Expand cbmem console bufferZheng Bao
Expand the size of cbmem console buffer from default value 0x20000 to 0x80000. Verified by running "cbmem -l" in Chromium OS shell. localhost ~ # cbmem -l CBMEM table of contents: NAME ID START LENGTH 0. FSP MEMORY 46535052 b97fe000 01000000 1. CONSOLE 434f4e53 b977e000 00080000 2. RW MCACHE 574d5346 b977d000 00000360 3. RO MCACHE 524d5346 b977c000 00000f20 4. FMAP 464d4150 b977b000 0000047c 5. TIME STAMP 54494d45 b977a000 00000910 6. VBOOT WORK 78007343 b9766000 00014000 7. RAMSTAGE 9a357a9e b9700000 00066000 8. ACPI BERT 42455254 b96fc000 00004000 9. CHROMEOS NVS 434e5653 b96fb000 00000f00 10. REFCODE 04efc0de b96ab000 00050000 11. MEM INFO 494d454d b96aa000 00000768 12. RAMOOPS 05430095 b95aa000 00100000 13. COREBOOT 43425442 b95a2000 00008000 14. ACPI 41435049 b957e000 00024000 15. TPM2 TCGLOG 54504d32 b956e000 00010000 16. SMBIOS 534d4254 b9566000 00008000 17. FSP RUNTIME 52505346 ba7febe0 00000004 18. POWER STATE 50535454 ba7feb80 00000060 19. ROMSTAGE 47545352 ba7feb60 00000004 20. EARLY DRAM USAGE 4544524d ba7feb40 00000008 21. ACPI GNVS 474e5653 ba7feb20 00000020 BUG=246268888 TEST=Skyrim Change-Id: I79205f31b4cc3276c1c213a171a6bf7e18d73a1c Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-10-26mb/google/skyrim: Enable CBFS VerificationKarthikeyan Ramasubramanian
Enable RO verification by GSC and CBFS verification. BUG=b:227809919 TEST=Build and boot to OS in Skyrim with CBFS verification enabled using x86 verstage and PSP verstage. Change-Id: Idd22a521a913705af0d2aca17acd1aa069a77f29 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66948 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-10-08mb/google/skyrim: Create frostflow variantChao Gui
Create the frostflow variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:240970782 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_FROSTFLOW Signed-off-by: Chao Gui <chaogui@google.com> Change-Id: I937e6562094968824e73bfa20390b3ec8b24dfa0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-10-07mb/google/skyrim: Override SPI flash bus speedKarthikeyan Ramasubramanian
Add configuration to bump up the SPI flash bus speed from 66 MHz to 100 MHz starting the board version where required schematics update is done. BUG=b:245949155 TEST=Build and boot to OS in Skyrim with 100 MHz SPI bus speed. Perform warm and cold reboot cycles for 100 iterations each. Observe that the boot time improved by ~115 ms compared to 66 MHz SPI flash bus speed. At 66 MHz: 508:finished loading body 538,319 (83,806) 11:start of bootblock 1,196,809 (624,777) 14:finished loading romstage 1,236,905 (39,163) 970:loading FSP-M 1,237,056 (37) 15:starting LZMA decompress (ignore for x86) 1,237,073 (17) 16:finished LZMA decompress (ignore for x86) 1,358,937 (121,864) 8:starting to load ramstage 2,010,304 (0) 15:starting LZMA decompress (ignore for x86) 2,010,312 (8) 16:finished LZMA decompress (ignore for x86) 2,067,181 (56,869) 971:loading FSP-S 2,078,232 (7,999) 17:starting LZ4 decompress (ignore for x86) 2,078,253 (21) 18:finished LZ4 decompress (ignore for x86) 2,084,297 (6,044) 90:starting to load payload 2,316,933 (5) 15:starting LZMA decompress (ignore for x86) 2,316,947 (14) 16:finished LZMA decompress (ignore for x86) 2,339,819 (22,872) Total Time: 2,464,338 At 100 MHz: 508:finished loading body 515,118 (59,364) 11:start of bootblock 1,115,043 (566,110) 14:finished loading romstage 1,146,713 (29,697) 970:loading FSP-M 1,146,865 (38) 15:starting LZMA decompress (ignore for x86) 1,146,881 (16) 16:finished LZMA decompress (ignore for x86) 1,249,351 (102,470) 8:starting to load ramstage 1,900,568 (1) 15:starting LZMA decompress (ignore for x86) 1,900,576 (8) 16:finished LZMA decompress (ignore for x86) 1,956,337 (55,761) 971:loading FSP-S 1,967,357 (7,930) 17:starting LZ4 decompress (ignore for x86) 1,967,377 (20) 18:finished LZ4 decompress (ignore for x86) 1,972,925 (5,548) 90:starting to load payload 2,205,300 (6) 15:starting LZMA decompress (ignore for x86) 2,205,313 (13) 16:finished LZMA decompress (ignore for x86) 2,227,087 (21,774) Total Time: 2,349,804 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I5e8db22151fbc2db1f9e81b3644338348160736d Reviewed-on: https://review.coreboot.org/c/coreboot/+/68116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jon Murphy <jpmurphy@google.com>
2022-10-04mb/google/skyrim: Enable amdfw separationKarthikeyan Ramasubramanian
Select the config to separate the AMDFW binary from the verified boot section. BUG=b:203597980 TEST=Build Skyrim BIOS image and boot to OS with PSP verstage passing the hash table and PSP verifying the binaries against the hash table. Observe boot time improvement of ~120 ms while operating SPI bus at 66 MHz with PSP verstage enabled. Before this patch series: 508:finished loading body 1,978,053,432 (201,518) After this patch series: 508:finished loading body 7,948,797,849 (83,460) Change-Id: I78ec6d28b4c5fc40bdade47489d58180a54dee4d Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Tim Van Patten <timvp@google.com>
2022-10-04mb/google/skyrim: Update Kconfig to point to SPLJon Murphy
ChromeOS requires a custom SPL table. Update Kconfig to point to the ChromeOS version of the SPL resident in the blobs directory. Bug=b:245727030 Test=Boots Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I70dcb19983c970283ee887b78a18c0668e83d4b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67928 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-30mb/google/skyrim: move EC switch selection from ChromeOS to VbootMatt DeVillier
This is a vboot feature, not a ChromeOS one, and unless selected by vboot, compilation will fail in the non-ChromeOS + vboot build case. TEST=build/boot skyrim w/vboot, w/o ChromeOS Change-Id: If9a5343907457bf3319f045262fdddf7eae2f1cb Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67995 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-30mb/google/skyrim/Kconfig: Enable DPTC and No Battery ModeTim Van Patten
Enable DPTC and No Battery Mode for Skyrim. This allows Skyrim to boot without a battery or with a critically low battery. DPTC remains disabled for the Winterhold and Morthal variants until it can be tested on those boards. BRANCH=none BUG=b:217911928 TEST=Boot skyrim with low & no battery Signed-off-by: Tim Van Patten <timvp@google.com> Change-Id: Icc4084476916cc8e142908d8e58baf7124568b8b Reviewed-on: https://review.coreboot.org/c/coreboot/+/67211 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-09-12mb/google/skyrim: Enable ASPMFred Reitberger
Enable Kconfig options for ASPM. TEST=Verify ASPM is enabled with `lspci -vvv`, `suspend_stress_test -c 10` passed all 10 times BUG=b:243771794 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I54071d9c9607da4561d745d152924d56904c0fee Reviewed-on: https://review.coreboot.org/c/coreboot/+/67444 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-08-24mb/google/skyrim: Create morthal variantMoises
Create the morthal variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:240970782 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_MORTHAL Signed-off-by: Moises <moisesgarcia@google.com> Change-Id: I25c25f067a040e6930f4fc60fadb8be85dc8eda6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Jon Murphy <jpmurphy@google.com>
2022-08-16mb/google/skyrim: Create winterhold variantIsaac Lee
Create the winterhold variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:240970782 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_WINTERHOLD Signed-off-by: Isaac Lee <isaaclee@google.com> Change-Id: I0e16f0a674aa3f4687cd82d5840a3c2087148a51 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66620 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-16mb/google/skyrim: Enable PSP PostcodesJon Murphy
This reverts commit I73b7ddec50936f7836f915f459ca0bdc0777cb22. Revert change to disable post codes. Post codes were initially disabled because of an issue with initialization within the SMU. BUG=b:227201571 TEST=Build and boot to OS in Skyrim. Change-Id: I2a2bd2252a103c682b5d4ad5ecd1da42b3744083 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66092 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-08-11treewide: Rename Sabrina to MendocinoJon Murphy
'Mendocino' was an embargoed name and could previously not be used in references to Skyrim. coreboot has references to sabrina both in directory structure and in files. This will make life difficult for people looking for Mendocino support in the long term. The code name should be replaced with "mendocino". BUG=b:239072117 TEST=Builds Cq-Depend: chromium:3764023 Cq-Depend: chromium:3763392 Cq-Depend: chrome-internal:4876777 Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I2d0f76fde07a209a79f7e1596cc8064e53f06ada Reviewed-on: https://review.coreboot.org/c/coreboot/+/65861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-08-03mb/google/skyrim: Enable PSP verstageKarthikeyan Ramasubramanian
Enabling required config items to execute verstage in PSP. BUG=b:217414563 TEST=Build and boot to OS in Skyrim with PSP verstage. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: Iee14dc80cb6691acb5cb59a21da5a3dff69f7dd2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66135 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-20mainboard/google/skyrim/baseboard: Enable Wake-On-LAN functionalityRobert Zieba
The generic wifi driver currently contains a lot of intel-specific functionality that interferes with enabling wake-on-lan. This commit changes the device tree to use the generic PCIe driver which better supports this functionality. BUG=b:237682766 TEST=Booted on skyrim device and verified that wake on LAN works Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I5d15d33fd0a152eb3bf2bfe78e802483a701e750 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65800 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-29mb/google/skyrim: Enable fingerprint sensor in SkyrimMoises Garcia
Add fingerprint device and select UART_ACPI driver. Disable FPMCU until the proper boot segment initializes it. BUG=b:228271993 BRANCH=NONE TEST=Can add fingerprints and unlock the device using them. Signed-off-by: Moises Garcia <moisesgarcia@google.com> Change-Id: I71e1c7d654395284cdec43bb6e5f581e546da36a Reviewed-on: https://review.coreboot.org/c/coreboot/+/65299 Reviewed-by: Jon Murphy <jpmurphy@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-06-28mb/google/skyrim: Add SoC thermal zoneFred Reitberger
The temperature values were taken from guybrush as a starting point for skyrim. BUG=b:230428864 TEST=Boot skyrim to OS and verify thermal zones are populated and working in /sys/class/thermal/ Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I6669b32f5e3dd63c6523f74166089eb4eb2d7848 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-06-21security/vboot: Add support for GSCVD (Google "RO verification")Julius Werner
This patch adds a new CONFIG_VBOOT_GSCVD option that will be enabled by default for TPM_GOOGLE_TI50 devices. It makes the build system run the `futility gscvd` command to create a GSCVD (GSC verification data) which signs the CBFS trust anchor (bootblock and GBB). In order for this to work, boards will need to have an RO_GSCVD section in their FMAP, and production boards should override the CONFIG_VBOOT_GSC_BOARD_ID option with the correct ID for each variant. BUG=b:229015103 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I1cf86e90b2687e81edadcefa5a8826b02fbc8b24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64707 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-06-07mb/google/skyrim/var/skyrim: Add audio codec and amp supportIan Feng
Add two combination: 1. ALC5682I-VS and ALC1019 2. NAU88L25 and MAX98360 BUG=b:227165780, b:228879074 TEST=emerge-skyrim coreboot chromeos-bootimage Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I36d7b5c4e88825ceaa6922d9e3bed366f55a0d81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-hsuan Hsu <yuhsuan@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-05-28mb/google/skyrim: Update Kconfig to use Ti50Jon Murphy
Skyrim uses the Ti50 GSC and the config should be updated to reflect that. BUG=b:233750667 TEST=Builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I5d4af19ab2dda35ab687a0659898d79b08c4de97 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-05-20mb/google/skyrim: Expose SKU and board ID to Chrome OSAmanda Huang
Select EC_GOOGLE_CHROMEEC_SKUID and EC_GOOGLE_CHROMEEC_BOARDID to provide common routine for reading skudid and boardid from Chrome EC. BUG=b:229052726 TEST=emerge-skyrim coreboot chromeos-bootimage Check the corresponding directory gets mounted to /run/chromeos-config/v1 Change-Id: I6aff02d29d44e95cd9b9e9485593c81f0d4a4b0e Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64378 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
2022-05-12mb/google/skyrim/var/skyrim: Add VL822 USB hubKarthikeyan Ramasubramanian
In Skyrim, USB-A port and WWAN modules are connected to the SoC USB ports through an external hub. Update the USB configuration in the devicetree accordingly. Enable the ACPI driver for external USB hub. BUG=b:227761300 TEST=Build and boot to OS in Skyrim. Ensure that the hub and USB-A ports are enumerated correctly in the output of lusub command. Change-Id: Ibf6a3da8add7361fc50adcf7c62e46df234685dc Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63586 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-21tpm: Refactor TPM Kconfig dimensionsJes B. Klinke
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-20mb/google/skyrim: Update SPI settings for skyrimChris.Wang
Update SPI setting as below: Normal speed:33mhz Fast speed:66mhz Alt speed:66mz TPM speed:33mhz BUG=b:225213679 TEST=boot skyrim and verify spi settings. Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com> Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-04-20ChromeEC boards: Drop `IGNORE_IASL_MISSING_DEPENDENCY`Angel Pons
This should no longer be needed because the ASL has been fixed. Change-Id: I4d1500217bef54fa3d2be397e5e2a155da3f965d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63525 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-04-19mb/google/skyrim: Configure Pen Detect deviceIan Feng
Enable pen garage. Pen detect is active low. BUG=b:229168203 TEST:Build and boot to OS in skyrim. Evtest work as expected Input driver version is 1.0.1 Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100 Input device name: "PRP0001:00" Supported events: Event type 0 (EV_SYN) Event type 5 (EV_SW) Event code 15 (SW_PEN_INSERTED) state 1 Properties: Testing ... (interrupt to exit) Event: time 1649922170.578779, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 0 Event: time 1649922170.578779, -------------- SYN_REPORT ------------ Event: time 1649922172.070740, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 1 Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I3bb07af6aebdc355a73148d8be79b1014147f61d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63633 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-03-29mb/google/skyrim: Disable PSP postcodesKarthikeyan Ramasubramanian
ESPI is not initialized in PSP. Hence any attempt to write to port80 causes failure to boot. Disable PSP postcodes for now and re-enable it later after ESPI is initialized in PSP. BUG=b:224618411 TEST=Build and boot to OS in Skyrim. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I73b7ddec50936f7836f915f459ca0bdc0777cb22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63119 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-03-10mb/google/skyrim: Configure WLANJon Murphy
Configure PCIe Clk Source and Clk Request mapping. Configure GPIOs used for WLAN. Mappping derived from Skyrim schematic. BUG=b:214412172 TEST=Builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I16e35b443f741d366589fefb7fd21863369d1ec2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62165 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-02-28mb/google/skyrim: Enable AP <-> D2 communicationJon Murphy
Configure D2 I2C and Interrupt GPIOs during the early initialization. Add devicetree configuration for D2 device and enable the required config items. BUG=b:214414776 TEST=Build Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I57b6d0e9da9935596e54b8eab400440e518b4523 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62163 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-02-28mb/google/skyrim: Add eSPI configurationJon Murphy
BUG=b:214413613 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: If1177dda705738222ce7f6f42dceafb14d37c98c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62162 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-28mb/google/skyrim: Add initial I2C configurationJon Murphy
Add I2C peripheral reset configuration required during early init. Enabled I2C generic and HID drivers. BUG=b:214414677 TEST=Build Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I06e564cf6eca844101d70ff865f3074b45a55d55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-02-28mb/google/skyrim: Log mainboard events to elogJon Murphy
BUG=b:214414851 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Ic427f88fee7739b064a8836e07841c80c99212a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-02-26mb/google/skyrim: Enable console UARTJon Murphy
BUG=b:214414501 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I053909ab73c1aa053f35a505b37571ff23adde89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-02-26mb/google/skyrim: Set up FW_CONFIGJon Murphy
BUG=b:214415048 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Ida8d226f84726f2eb03b07618907b0ce3928bec5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62146 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-26mb/google/skyrim: Enable Chrome ECJon Murphy
BUG=b:214413613 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I15c7c482c4a5ddef22a221794b9ef03f9b7ffe05 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62046 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-26mb/google/skyrim: Enable variants for SkyrimJon Murphy
BUG=b:214414033 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I034ab8a06842bee12060103b4a1bc4e3db69e42a Reviewed-on: https://review.coreboot.org/c/coreboot/+/62145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-02-26mb/google/skyrim: CONFIG_CHROMEOSJon Murphy
BUG=b:214415401 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I045f76c366a1a72814536a2be984b7ad5a438a5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/62043 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-03mb/google/skyrim: Add new mainboardKarthikeyan Ramasubramanian
Skyrim is a new Google mainboard with AMD Sabrina SOC. BUG=b:214413553 TEST=util/abuild/abuild -t GOOGLE_SKYRIM --clean Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jon Murphy <jpmurphy@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-12 16:42:59 +0000