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2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-09-04bootmode: add display_init_required()Aaron Durbin
Some of the Chrome OS boards were directly calling vboot called in some form after contorting around #ifdef preprocessor macros. The reasoning is that Chrome OS doesn't always do display initialization during startup. It's runtime dependent. While this is a requirement that doesn't mean vboot functions should be sprinkled around in the mainboard and chipset code. Instead provide one function, display_init_required(), that provides the policy for determining display initialization action. For Chrome OS devices this function honors vboot_skip_display_init() and all other configurations default to initializing display. Change-Id: I403213e22c0e621e148773597a550addfbaf3f7e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11490 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-04-14rush: Configure display related clock, pad, and powerJimmy Zhang
BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush Change-Id: I9c2235ccc5571f1919dc013c62488390fe31dcbc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7468c14842c680be81620ad3fd2ea9ae056d525f Original-Change-Id: Iaf7f70727fc914b9bb2d063c9a30ece4451d40da Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/238942 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-13rush: Add and select DO_SOR_INIT config optionJimmy Zhang
Select DO_SOR_INIT to enable dp display api BUG=chrome-os-partner:34336 BRANCH=none TEST=build rush Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Change-Id: Iddf19195722856865a7c06ce96492012ab729184 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 31492f51c030aeb7a3ac792a02665642ec999405 Original-Change-Id: I4daca43239235ca6d233c4457096d3b98fcaf65c Original-Reviewed-on: https://chromium-review.googlesource.com/234274 Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com> Reviewed-on: http://review.coreboot.org/9586 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13rush: audio: Setup I2S1/DAP2 and EXTPERIPH1/MCLK muxes correctlyTom Warren
With this change, audio 'beeps' are heard on boot if Ctrl-U is pressed, or devmode/recmode is entered. I also tested via an explicit call to VbExBeep in the kernel boot path. Note that a couple of Rush CLs for depthcharge are needed for audio, too. BUG=chrome-os-partner:32582 BRANCH=none TEST=as above. Built and booted Rush/Norrin64. Change-Id: I43c65a4d11c5ab7b16289e19f3b42cfc0300ea7c Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 4a682fb2403f7c6d53e74bfa945481242577f6c3 Original-Change-Id: Ia37f077569afd806ce6574c4c58813fd7aca1644 Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/233671 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9579 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10google/rush: Add I2C1 init and audio clock enable/resetsTom Warren
This should allow the max98090 codec to play beeps via AHUB/I2S1 thru the depthcharge sound driver. BUG=none BRANCH=none TEST=Saw max98090 codec init signon and register dump. No sound yet. Change-Id: I1ee0b61f5cbfe587ebd16b7dd9dce08d9d62c2c5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f4ee2ce3704711a9e00531b7599a1bcf194203ec Original-Change-Id: I0bc8401e76b2c80a01083ac933a39f6cd4d1b78a Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/229496 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Mike Frysinger <vapier@chromium.org> Reviewed-on: http://review.coreboot.org/9429 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-08tegra132: Change all SoC headers to <soc/headername.h> systemJulius Werner
This patch aligns tegra132 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Rush_Ryu. Change-Id: I5cdf4008a65db84f15c937ef53aab5e4d3ef24c4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d5c5c63d7b6399d3eb8a211b15d47829fe93a591 Original-Change-Id: Ifafd4d42d4fb04a1c37e8a5f23877c2b550cf44c Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224505 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9369 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-28rush: ryu: remove mainboard_add_memory_ranges()Aaron Durbin
There's no need to add DMA ranges for these boards as that memory is allocated within dpethcharge now. Additionally, the DRAM_DMA_* Kconfig options were removed resulting in 0 values. BUG=None TEST=Built rush and ryu. BRANCH=None Change-Id: I597437960e4fddbf6d26f0b15ddeefc4557adc8b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f26b503d759b2bac902e58e928d7c625c1a6c575 Original-Change-Id: I52bb8f760a56226c75611f7981570a44d56f242e Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219710 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9101 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-28rush: Get rid of coreboot setting up DMA areas for libpayloadFurquan Shaikh
BUG=chrome-os-partner:31634 BRANCH=None TEST=Compiles successfully Change-Id: Ife5300db8721a158f8a3b027aca4c51e4ea513a6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 02bcdc7069e271563b7fd1893b92fb4d33cf8529 Original-Change-Id: I59e0f8d26d50baf68561b38f370195dea98881e1 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/217572 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9073 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26rush: Add usb support for rush in corebootFurquan Shaikh
BUG=chrome-os-partner:31293 BRANCH=None TEST=With non-cacheable memory region and dma range addition, booting from usb reaches the same point as mmc. Change-Id: I218c751f41fb881af4fed0bcccc378dde1fd07b4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a26e07b58f454c598bf5b7a4940c238135548bbd Original-Change-Id: I1083f8de2bfbe9a233d317b29b8fc56f47c7061d Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/211039 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8937 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26rush: support for DMA regionFurquan Shaikh
Currently rush needs a DMA region in order to communicate with USB devices. Therefore, add that region to the memory map. BUG=chrome-os-partner:31293 BRANCH=None TEST=With the changes for adding non-cacheable memory range and adding DMA region, booting from USB reaches same point as MMC. Change-Id: I82d97840fad8cc96bf958c6efa13d2fdc1233d79 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b182651a1b6db1a7adbf315b6865467590a0785c Original-Change-Id: I6a465eaa77e0d5ab4d5fb22161e88e7a5fd9c4a8 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/212193 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8928 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26rush: Convert rush initialization to use funitcfg apiFurquan Shaikh
Use funitcfg api for bootblock, romstage as well as ramstage initialization in rush. BUG=chrome-os-partner:31251 BRANCH=None TEST=Compiles successfully and boots till last known good point. Change-Id: I243597de9ec13904a2bb58a04b402f9545424760 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0618ea6828bae3e700b85b79b185aec28568b8ae Original-Change-Id: I8f5801c1c214f05ef9d2ba976838605da2d8b914 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/211766 Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8922 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25rush: switch to padconfig API in ramstageFurquan Shaikh
BUG=chrome-os-partner:29981 BRANCH=None TEST=Compiles successfully and boots until kernel FIT header error as before. Change-Id: Ib4160b622c15cc5e4230bb43688a825ef68a69f0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4fed2969242909921dc843de063e67b3769d1786 Original-Change-Id: I5637b84d5153c745b4a07a4bf8c72ae1e6f2f21c Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/211033 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8909 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25rush: Add support for chromeos_ecFurquan Shaikh
BUG=chrome-os-partner:31032 BRANCH=None TEST=Compiles successfully and ec error fixed while booting. Change-Id: I7bb78b8986931407ee67f33e83b9d887bea7ac70 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5447adb964276b9e13399ac93140ae763a149aad Original-Change-Id: I02172a30863b7b97892289e880c29f2d71220fda Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/210436 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8898 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-23rush: Add MMC supportFurquan Shaikh
BUG=None BRANCH=None TEST=Compiles successfully. Depthcharge is able to see mmc. Original-Change-Id: Ia0c9b432fa447c64fa13e5fae5a66a26bbc86360 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/210002 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 4cb05ffa95a2a36c5b4606d2f0efe9e574b84e1d) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I7f9a27a4c0f0553e78fc1a289bffebbebd37c099 Reviewed-on: http://review.coreboot.org/8716 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-01-26rush: Add support for rush boardFurquan Shaikh
Add basic support for rush board BUG=None BRANCH=None TEST=Compiles successfully with soc tegra132 and armv8 arch selected for romstage and ramstage Original-Change-Id: Ica57c68d230e4e0e9916729752395843de188733 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/197399 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 06a040dc320d7b04ec0f7e51c1b3987c8f6d80f3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ica57c68d230e4e0e9916729752395843de188733 Reviewed-on: http://review.coreboot.org/8041 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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