Age | Commit message (Collapse) | Author |
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Move the CHROMEOS dependent symbols VIRTUAL_DEV_SWITCH and
VBOOT_DYNAMIC_WORK_BUFFER under the CHROMEOS config options for the
mainboards that use them.
Change-Id: Iad126cf045cb3a312319037aff3c4b1f15f6529d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11336
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
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Add 'select MAINBOARD_HAS_NATIVE_VGA_INIT' which is just used as a gate
symbol to display MAINBOARD_DO_NATIVE_VGA_INIT to the mainboards that
are already selecting MAINBOARD_DO_NATIVE_VGA_INIT.
Since MAINBOARD_HAS_NATIVE_VGA_INIT is not used in any code, this should
not have any other effects.
This fixes the warning:
warning: (BOARD_SPECIFIC_OPTIONS) selects MAINBOARD_DO_NATIVE_VGA_INIT
which has unmet direct dependencies (VENDOR_ASUS && BOARD_ASUS_KFSN4_DRE
|| MAINBOARD_HAS_NATIVE_VGA_INIT)
Change-Id: I8ceee69ebae90dc32f55df58c2e80fe25397f049
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11301
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add CHROMEOS dependencies to selects for the following Kconfig
symbols:
CHROMEOS_RAMOOPS_DYNAMIC
CHROMEOS_RAMOOPS_NON_ACPI
CHROMEOS_VBNV_CMOS
CHROMEOS_VBNV_EC
CHROMEOS_VBNV_FLASH
EC_SOFTWARE_SYNC
LID_SWITCH
RETURN_FROM_VERSTAGE
SEPARATE_VERSTAGE
VBOOT_DISABLE_DEV_ON_RECOVERY
VBOOT_EC_SLOW_UPDATE
VBOOT_OPROM_MATTERS
VBOOT_STARTS_IN_BOOTBLOCK
WIPEOUT_SUPPORTED
This gets rid of these sorts of Kconfig errors:
warning: BOARD_SPECIFIC_OPTIONS selects CHROMEOS_VBNV_EC which has
unmet direct dependencies (MAINBOARD_HAS_CHROMEOS && CHROMEOS)
Note: These two boards would never actually have CHROMEOS enabled:
intel/emeraldlake2 has MAINBOARD_HAS_CHROMEOS commented out
google/peach_pit doesn't have MAINBOARD_HAS_CHROMEOS
Change-Id: I51b4ee326f082c6a656a813ee5772e9c34f5c343
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11272
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
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MAINBOARD_HAS_BOOTBLOCK_INIT is only declared once and selected elsewhere
(with no overlap), and never read. Remove it.
Change-Id: Ica1f16182b556dbf4a3b747237af74bcc4c0608c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10254
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
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Rename Kconfig options for secmon and spintable to be prefixed with
ARM64_ instead of ARCH_, which seems to be the standard throughout the
rest of coreboot (e.g. ARM_LPAE or X86_BOOTBLOCK_SIMPLE). I think this
provides a clearer separation between generic options that are selected
by the architecture (e.g. a hypothetical ARCH_HAS_FEATURE_X similar to
some of the MAINBOARD_HAS_... we have) and options that only make sense
in the context of a single architecture.
Change-Id: I38c2efab833f252adbb7b61ef0af60ab25b768b0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5067e47bc03f04ad2dba044f022716e0fc62bb9e
Original-Change-Id: I1b2038acc0d054716a3c580ce97ea8e9a45abfa2
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/270783
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10242
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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These options will need to just be selected in within
the .config files. There's not need in duplicating all
these options.
Change-Id: I7b670bc59a3b35e39eee4faecaf4aa779d47a3bb
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9959
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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For boards with MAINBOARD_HAS_CHROMEOS, we should also
state what kind of storage is available for vboot's
non-volatile data.
The flags are taken from the chromium repository and
have no effect with CHROMEOS disabled.
Change-Id: I1747ad26c8c7f6d4076740ec2800dbd52c5d6b3d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9952
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Some recently upstreamed boards are missing this flag
Change-Id: I89d73970f23eed6ea127e620c38f9687b2f5b048
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9949
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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This patch switches the mainboards with board id straps
to use BOARD_ID_AUTO instead of BOARD_ID_SUPPORT.
On urara, which does not have those straps, the option is
removed. (And re-added for urara derivatives through setting
the config option BOARD_ID_MANUAL
BRANCH=none
BUG=chrome-os-partner:37593
TEST=emerg-nyan_big coreboot, emerge-urara coreboot, emerge-buranku coreboot
Change-Id: I5ac4024c6f1f9b9d7a5179d88722c69b23b82bbd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 22a470698f9c9ed275aa8150a5bb8d8cf368b050
Original-Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Change-Id: I48c291ad6f255a28c833bebc2638bfafa2782e74
Original-Reviewed-on: https://chromium-review.googlesource.com/262935
Original-Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Reviewed-on: http://review.coreboot.org/9906
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Select DO_SOR_INIT to enable dp display api
BUG=chrome-os-partner:34336
BRANCH=none
TEST=build rush
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Change-Id: Iddf19195722856865a7c06ce96492012ab729184
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 31492f51c030aeb7a3ac792a02665642ec999405
Original-Change-Id: I4daca43239235ca6d233c4457096d3b98fcaf65c
Original-Reviewed-on: https://chromium-review.googlesource.com/234274
Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-on: http://review.coreboot.org/9586
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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CQ-DEPEND=CL:221601, CL:*178568
BUG=chrome-os-partner:32684
BRANCH=None
TEST=Compiles successfully
Original-Change-Id: I50d0475dbe1390b640a726c259364f36abcbebe0
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/221579
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 14e348721399f13a52258faa16769b0ebb5b511f)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I2683cb29c7a93f3f4aba0d7b9a56a1ca209518a0
Reviewed-on: http://review.coreboot.org/9432
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
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With the generic spin table support in place, use that.
BUG=chrome-os-partner:32082
BRANCH=None
TEST=None
Change-Id: I7c9ebd16cd7d5e938e686df2225c612581382983
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fb0d79f89e27fcd51cc751a94008b3801f5c6d0b
Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Change-Id: Ic9949144ed1e9a952290d50b6726bf5891547896
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218657
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9087
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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BUG=chrome-os-partner:31634
BRANCH=None
TEST=Compiles successfully
Change-Id: Ife5300db8721a158f8a3b027aca4c51e4ea513a6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 02bcdc7069e271563b7fd1893b92fb4d33cf8529
Original-Change-Id: I59e0f8d26d50baf68561b38f370195dea98881e1
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/217572
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9073
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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We don't set these by default in upstream.
Change-Id: Ida7aa498e0fe291c6cf3cf31d6516530a9d136d9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/8988
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Currently rush needs a DMA region in order to communicate with
USB devices. Therefore, add that region to the memory map.
BUG=chrome-os-partner:31293
BRANCH=None
TEST=With the changes for adding non-cacheable memory range and adding DMA
region, booting from USB reaches same point as MMC.
Change-Id: I82d97840fad8cc96bf958c6efa13d2fdc1233d79
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b182651a1b6db1a7adbf315b6865467590a0785c
Original-Change-Id: I6a465eaa77e0d5ab4d5fb22161e88e7a5fd9c4a8
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/212193
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8928
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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BUG=chrome-os-partner:31032
BRANCH=None
TEST=Compiles successfully and ec error fixed while booting.
Change-Id: I7bb78b8986931407ee67f33e83b9d887bea7ac70
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5447adb964276b9e13399ac93140ae763a149aad
Original-Change-Id: I02172a30863b7b97892289e880c29f2d71220fda
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/210436
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8898
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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These boards are supposed to be able to determine the board ID at run
time based on GPIO settings.
BUG=chrome-os-partner:30489
TEST=verified that all boards build. Checked that storm proto0 reports
board ID of 0 on the console
Original-Change-Id: Iadd758a799d69e1e34579d7d495378856b64c45b
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210119
(cherry picked from commit f4d41ddf906c1bf0d10da38011998fa0a630c332)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I0d5f94d3428157a70f0a9d711b57432e3f796733
Reviewed-on: http://review.coreboot.org/8722
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Update rush Kconfig file to include TPM and RAMSTAGE_INDEX options
BUG=None
BRANCH=None
TEST=Compiles successfully. TPM works. Ramstage boots successfully.
Original-Change-Id: Ie55260c710ffcb6a2e04c8658ca6dd3cdec6b6db
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209978
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 0088f5aade8533c6ed235de25934d47cd0743a67)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I5c4a54b74546de73eee7e7bae072cc712ce1838f
Reviewed-on: http://review.coreboot.org/8680
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Hardcoded values are set for developer,recovery mode. Change as per requirements
BUG=chrome-os-partner:30784
BRANCH=None
TEST=Compiles succesfully for rush
Original-Change-Id: Ied506a9d1c4e0ba8ee06d57c6ca8c726220998b5
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209974
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 2e6934d47c5b4bb98e60486202b230bae79d927b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I36e384b0d331fdd9e3f47954decfddaf4f31aed3
Reviewed-on: http://review.coreboot.org/8678
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Add proper Kconfig options and initialize cbfs media to enable loading of
romstage
BUG=None
BRANCH=None
TEST=Compiles successfully for rush and cbfs_load_stage returns entry pointer
for romstage
Original-Change-Id: If62edcdc0496d89d30003ffd7b827b77835910fd
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205762
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit c89c05bc86fd6c1e49fbed5e0730659b64bffc6c)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I68c10171424c85605b5065a19634d3c5dd639b78
Reviewed-on: http://review.coreboot.org/8572
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
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Pull in mainboard specific bootblock_init function from nyan into
rush. Additionally, pull in all files required for proper compilation of rush
after adding the bootblock_init function
BUG=None
BRANCH=None
TEST=Compiles successfully for rush
Original-Change-Id: I69c736275f66eca3ad92f97d166e91d4c2301364
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205583
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit e7aac547026717d7380f71593010e3ea34ecea51)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ie26f91f8caaa06af3b195246febcdc70b9fe9795
Reviewed-on: http://review.coreboot.org/8570
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
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Changes might be required for .bct files as we get to know more.
Pulling in files from mainboard nyan for now
BUG=None
BRANCH=None
TEST=Compiles successfully for rush
Change-Id: Iaf81a384af0469c77940cf7309ba68018110b5eb
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/203144
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit d3633f8cf8c01a07b54ceef2dd7bf7a64afd7c76)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8412
Reviewed-by: Aaron Durbin <adurbin@google.com>
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Add basic support for rush board
BUG=None
BRANCH=None
TEST=Compiles successfully with soc tegra132 and armv8 arch selected for
romstage and ramstage
Original-Change-Id: Ica57c68d230e4e0e9916729752395843de188733
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/197399
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 06a040dc320d7b04ec0f7e51c1b3987c8f6d80f3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ica57c68d230e4e0e9916729752395843de188733
Reviewed-on: http://review.coreboot.org/8041
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
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