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path: root/src/mainboard/google/panther/Kconfig
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2016-07-28vboot: Separate vboot from chromeosFurquan Shaikh
VBOOT_VERIFY_FIRMWARE should be independent of CHROMEOS. This allows use of verified boot library without having to stick to CHROMEOS. BUG=chrome-os-partner:55639 Change-Id: Ia2c328712caedd230ab295b8a613e3c1ed1532d9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15867 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-02-12chromebooks: Define GBB hardware IDsPatrick Georgi
This makes the test IDs the default, taken from depthcharge master (board/*/fmap.dts, hwid property). Change-Id: I25793962ac16f451f204dbba6ede6a64c847cfd5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13634 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
2015-08-26ChromeOS mainboards: Move more Kconfig symbols under CHROMEOSMartin Roth
Move the CHROMEOS dependent symbols VIRTUAL_DEV_SWITCH and VBOOT_DYNAMIC_WORK_BUFFER under the CHROMEOS config options for the mainboards that use them. Change-Id: Iad126cf045cb3a312319037aff3c4b1f15f6529d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/11336 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-08-21ChromeOS: Fix Kconfig dependenciesMartin Roth
Add CHROMEOS dependencies to selects for the following Kconfig symbols: CHROMEOS_RAMOOPS_DYNAMIC CHROMEOS_RAMOOPS_NON_ACPI CHROMEOS_VBNV_CMOS CHROMEOS_VBNV_EC CHROMEOS_VBNV_FLASH EC_SOFTWARE_SYNC LID_SWITCH RETURN_FROM_VERSTAGE SEPARATE_VERSTAGE VBOOT_DISABLE_DEV_ON_RECOVERY VBOOT_EC_SLOW_UPDATE VBOOT_OPROM_MATTERS VBOOT_STARTS_IN_BOOTBLOCK WIPEOUT_SUPPORTED This gets rid of these sorts of Kconfig errors: warning: BOARD_SPECIFIC_OPTIONS selects CHROMEOS_VBNV_EC which has unmet direct dependencies (MAINBOARD_HAS_CHROMEOS && CHROMEOS) Note: These two boards would never actually have CHROMEOS enabled: intel/emeraldlake2 has MAINBOARD_HAS_CHROMEOS commented out google/peach_pit doesn't have MAINBOARD_HAS_CHROMEOS Change-Id: I51b4ee326f082c6a656a813ee5772e9c34f5c343 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/11272 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
CAR_MIGRATION was removed in commit: cbf5bdfe - CBMEM: Always select CAR_MIGRATION ALT_CBFS_LOAD_PAYLOAD was removed in commit: cf6c9cc2 - Kill ALT_CBFS_LOAD_PAYLOAD MARK_GRAPHICS_MEM_WRCOMB was removed in commit: 30fe6120 - MTRR: Mark all prefetchable resources as WRCOMB. EXTERNAL_MRC_BLOB was removed in commit: 0aede118 - Drop unused EXTERNAL_MRC_BLOB CACHE_ROM is only in Google's codebase. LID_SWITCH is only in Google's codebase. DEFAULT_POST_DEVICE_LPC is only in Sage's codebase. ROMSTAGE_RTC_INIT is only in Sage's codebase, or was never used. HUDSON_NOT_LEGACY_FREE never existed as far as I can tell. MAINBOARD_DO_EDID never existed as far as I can tell. Change-Id: I636ea7584fb47885638dbcd9ccedfafb1ca2c640 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10616 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
This code is not specific to ChromeOS and is useful outside of it. Like with small modifications it can be used to disable TPM altogether. Change-Id: I8c6baf0a1f7c67141f30101a132ea039b0d09819 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10269 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-05-19intel/haswell: Drop MONOTONIC_TIMER_MSRPatrick Georgi
The variable was set on all haswell boards, so we can do it like on broadwell where the MSR based timer is assumed to be around, too. Change-Id: Id48ad7454d4cf83c3b1616b64687cdcfee4baa10 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10256 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2015-04-30cpu/intel/haswell: remove dependency on socket_rpga989Matt DeVillier
Remove dependency of Haswell on cpu/intel/socket_rpga989 code, which is a carry-over from Sandy Bridge/Ivy Bridge and older coreboot conventions where features were structured around socket types. Add CPU-specific options to Kconfig and required subdirs to Makefile.inc which are curently included with socket_rpga989. TEST=successfully built and booted on google/panther Change-Id: Ic788e2928df107d11ea2d2eca7613490aaed395c Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/10037 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-28boards: remove VBOOT_(REFCODE|RAMSTAGE|ROMSTAGE)_INDEXAaron Durbin
These options will need to just be selected in within the .config files. There's not need in duplicating all these options. Change-Id: I7b670bc59a3b35e39eee4faecaf4aa779d47a3bb Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9959 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-22mainboards: Add CHROMEOS_VBNV_* where appropriatePatrick Georgi
For boards with MAINBOARD_HAS_CHROMEOS, we should also state what kind of storage is available for vboot's non-volatile data. The flags are taken from the chromium repository and have no effect with CHROMEOS disabled. Change-Id: I1747ad26c8c7f6d4076740ec2800dbd52c5d6b3d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9952 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-04-10vboot: add physical recovery switch supportDaisuke Nojiri
PHYSICAL_REC_SWITCH is set n by default and y for panther and stumpy. BUG=none BRANCH=ToT TEST=Built nyan_blaze using vboot1/2. Built falco, lumpy, nyan, blaze, parrot, rambi, samus, storm, pinky with default configuration. panther and stumpy are not tested because they currently don't build on ToT. Original-Change-Id: Ic45f78708aaa7e485d2ab459fd1948524edb412f Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/227940 Original-Reviewed-on: https://chromium-review.googlesource.com/229602 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit edb2ba347b48887ffe450586af0351e384faad59) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I277f665cd4f3e1c21745cdc5c7a2cfe148661abe Reviewed-on: http://review.coreboot.org/9444 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2014-12-06Remove IRQ_SLOT_COUNT on all boards without PIRQ table.Vladimir Serbinenko
This config is used only to generate PIRQ table. If no such table is supplied there is no need for config. Change-Id: I537d440f53019a6bf7f190446074e75e7420545a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7566 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-09-05Consolidate intel vga int15 hooksVladimir Serbinenko
Change-Id: I9366dded98bf15f6da44ce893dd10698ba09fd55 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6820 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-12google/panther: Fix RW ramstage indexStefan Reinauer
Without this patch coreboot will always use the read-only version of ramstage, even if there is a read-write version available. BRANCH=panther BUG=chrome-os-partner:25870 TEST=Install different RO and RW version, check in cbmem log that coreboot's romstage and ramstage have different timestamps in their banners. Change-Id: I723a3d4479d59534660728d891a9f40a077b4ef0 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186664 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/6005 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12mainboard: Add new board Google PantherMohammed Habibulla
(Panther clone of Ia41af8425ab6c24746253abd025acd3365dd5a18 by reinauer) BUG=chrome-os-partner:23563 TEST=emerge-panther chromeos-coreboot-panther [pg: Drop configs/, which is chromeos stuff, adapted libpayload's config.panther to work with upstream] [pm: Add HAVE_IFD_BIN and HAVE_ME_BIN Kconfig options] [pm: rebase to master branch of coreboot upstream] [md: don't use FMAP to get MAC address if CONFIG_CHROMEOS not set] Change-Id: I50fd5c02da154e424dfefbe2020f4ce7ef9a4f8f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174555 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5990 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-24 18:24:37 +0000