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path: root/src/mainboard/google/octopus/mainboard.c
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2022-09-28mb/google/octopus: rename baseboard GPIO table getter for clarityMatt DeVillier
Rename variant_base_gpio_table() to baseboard_gpio_table(), since the GPIO table comes from the baseboard, and is overridden by a separate table from the variant. Drop the __weak qualifier as this function is not overridden. Change-Id: I17db734784ce96cdf5e0486dc2ad057d73bfb15f Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67804 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-12-23ChromeOS: Refactor ACPI CNVS generationKyösti Mälkki
Remove chromeos_dsdt_generator() calls under mainboard, it is possible to make the single call to fill \CNVS and \OIPG without leveraging device operations. Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-12-13mb/google/octopus: add ALC5682I-VS to be supported in the SSFCPaul Huang
Add ALC5682I-VS codec support. ALC5682I-VD/ALC5682I-VS load different hid name depending on SSFC. BUG=b:198722640 BRANCH=octopus TEST=Set CBI SSFC BIT9-11 to select codec, and test audio works Change-Id: I80be12d88e100ce8586371fc49b36447859e24f8 Signed-off-by: Paul Huang <paul2_huang@pegatron.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59856 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marco Chen <marcochen@google.com>
2021-10-05src/mainboard to src/security: Fix spelling errorsMartin Roth
These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-23mb/google/octopus/var/fleex: Add ssfc codec cs42l42 supportEric Lai
Add cs42l42 codec support in fleex. BUG=b:184103445 TEST=boot to check cs42l42 is functional. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I1571003f8b272a573e6ab9fb525f17659bae8c4c Reviewed-on: https://review.coreboot.org/c/coreboot/+/52363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-16mb/google/octopus: Add log for ssfc update codecEric Lai
Add log to show the codec has been disabled. BUG=b:185193926 TEST=cbmem -c | grep disabled, can find the codec name Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I8ce7e435ce73beb2a5cbf5883905554227b1989b Reviewed-on: https://review.coreboot.org/c/coreboot/+/52314 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marco Chen <marcochen@google.com>
2021-01-08mb/google/octopus: add audio codec into SSFC support for BobbaMarco Chen
BUG=b:174118027 BRANCH=octopus TEST=adjust SSFC value of CBI to select RT5682 or DA7219 then check whether device tree is updated correspondingly by disabling unselected one. Signed-off-by: Marco Chen <marcochen@google.com> Change-Id: Id37c4c5716ade0851cfcb24e12b390841e633ac9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48795 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
2020-05-18src: Remove unused 'include <string.h>'Elyes HAOUAS
Unused includes found using following commande: diff <(git grep -l '#include <string.h>' -- src/) <(git grep -l 'memcpy\|memmove\|memset\|memcmp\|memchr\|strdup\|strconcat\|strnlen\|strlen\|strchr\|strncpy\|strcpy\|strcmp\|strncmp\|strspn\|strcspn\|atol\|strrchr\|skip_atoi\|STRINGIFY' -- src/) |grep -v vendorcode |grep '<' Change-Id: Ibaeec213b6019dfa9c45e3424b38af0e094d0c51 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41242 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
.write_acpi_tables() should not be updating the device structure. This change makes the struct device * argument to it as const. Change-Id: I50d013e83a404e0a0e3837ca16fa75c7eaa0e14a Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-04-13ec/google/chromeec: add smbios_mainboard_manufacturer()Aaron Durbin
When EC_GOOGLE_CHROMEEC_SKUID is selected provide an implementation of smbios_mainboard_manufacturer() so the code doesn't need to be duplicated in the mainboards. BUG=b:153767369 Change-Id: Ib65fe373a79d606cffcba71882b0db61be5a18c3 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-04-06mb/google/octopus: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I8076155330100982de82d410b6579ac99ed89e7b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40187 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
These two identifiers were always very confusing. We're not filling and injecting generators. We are filling SSDTs and injecting into the DSDT. So drop the `_generator` suffix. Hopefully, this also makes ACPI look a little less scary. Change-Id: I6f0e79632c9c855f38fe24c0186388a25990c44d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39977 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: David Guckian Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2019-12-26mb/google/octopus/variants/bobba: fix LTE power sequence and moveSheng-Liang Pan
get_board_sku to smm stage. fix Power_off section power sequence. power_off_lte_module() should run in smm stage, add variant.c in smm stage. also move get_board_sku() to mainboard_misc.c so that we can use it in smm stage and ramstage. BUG=b:144327240 BRANCH=octopus TEST=build image and verify on the DUT with LTE DB. Change-Id: I287ba1cb092a95b3a9dd1f960a3b84fd85b9b221 Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37649 Reviewed-by: Marco Chen <marcochen@google.com> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-19mb/google/octopus: Disable unused USB devicesKarthikeyan Ramasubramanian
Disable unused USB devices in the device tree so that the concerned ACPI objects do not get exported to the OS. BUG=b:133513961 BRANCH=octopus TEST=Boot to ChromeOS. Ensure that the USB devices are disabled based on port status and the concerned ACPI objects are not exported. Change-Id: I0faccdfb8a9df9ec52130437433b15973e3d6f1a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-06-21mb/google/octopus: expose get_board_sku as globalKevin Chiu
BUG=b:134912735 BRANCH=octopus TEST=emerge-octopus coreboot chromeos-bootimage Change-Id: I1fb7b5eeac48f2cd9c24fa1d3ac3fe4b390762d2 Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33448 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-16x86/smbios: Untangle system and board tablesNico Huber
We were used to set the same values in the system and board tables. We'll keep the mainboard values as defaults for the system tables, so nothing changes unless somebody overrides the system table hooks. Change-Id: I3c9c95a1307529c3137647a161a698a4c3daa0ae Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29477 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
Change-Id: I2e28b9f4ecaf258bff8a062b5a54cb3d8e2bb9b0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-16mb/google/octopus: override smbios manufacturer name from CBIWisley Chen
BUG=b:118798180 TEST=emerge-octopus Change-Id: I241a76e3b55ad721c6c0176462c310bcca6b3c5d Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/29503 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-08Move compiler.h to commonlibNico Huber
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-08-23mb/google/octopus: Add null pointer checkJohn Zhao
src/mainboard/google/octopus/mainboard.c Function dev_find_slot may return NULL, check before its usage. Found-by: klockwork BRANCH=None TEST=Built & booted Yorp board. Change-Id: I160adbe3b0a5a2b0f11fd1567513860664d4bee3 Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/28235 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-12mb/google/octopus: Configure WiFi wake as NC when using CNViFurquan Shaikh
When CNVi is being used, external wake using GPIO_119 is not required. This change configures GPIO_119 as PAD_NC if CNVi is taken out of reset. BUG=b:112371978 Change-Id: Ifee90f428ed43c4d7c612c170476aff43b4a33ce Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-08-12mb/google/octopus: Dynamically disable CNVi/PCIe deviceFurquan Shaikh
This change checks to see if CNVi module is out of reset: 1. If yes, then PCIe device for WiFi is disabled. 2. If no, then CNVi device is disabled. BUG=b:112371978 Change-Id: I6e6cf2e646c897df017913056db87ac0cffa1a8e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27961 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-07-26mb/google/octopus: Use newly added gpio_configure_pads_with_overrideFurquan Shaikh
This change updates mainboard_init to call gpio_configure_pads_with_override instead of gpio_configure_pads to allow variants to provide overrides for the GPIO config table provided by the baseboard. BUG=b:111743717 TEST=Verified on phaser that GPIO config with and without this change is the same. Change-Id: I494a950100e5ec82504d652ff6e8a75746456d1f Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27641 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-26mb/google/octopus: add variant devicetree update callbackAaron Durbin
The variants of the octopus family have their own schedule and needs for modifying settings based on the phase of the build schedule while also needing to maintain support for previous builds. Therefore, utilize the SoC callback, mainboard_devtree_update(), but just callback into the newly introduced variant_update_devtree(). The indirection allows for the ability to move the call around earlier than the mainboard_devtree_update() if needed while maintaining consistency in the naming of the variant API. BUG=b:111808427,b:111743717 TEST=built Change-Id: If1c2f60cabe65b5f1c6a04dd60e056e50c4993df Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/27637 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-07-23mb/google/octopus: Add support for smbios_mainboard_skuFurquan Shaikh
This change provides implementation of smbios_mainboard_sku that queries the EC for SKU ID using CBI. Currently, get_board_sku() is implemented as a common function for all variants since this is the only way used by all the octopus variants to query SKU ID. If this changes in the future, this function can be changed to a variant_* callback. BUG=b:111671163 TEST=Verified following on phaser: 1. "mosys platform sku" returns the SKU ID programmed in CBI 2. "dmidecode -t 1" shows SKU information as "skuXYZ" where XYZ is the SKU ID programmed in CBI. Change-Id: Ic0d344b3c13632f2ca582adc36aa337b99959712 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27560 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jett Rink <jettrink@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2018-05-08mb/google: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: I8e549e4222ae2ed6b9c46f81c5b5253e8b227ee8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-02-15mb/google/octopus: Add new boardHannah Williams
Add octopus board using GLK soc. Copied base code from mainboard/intel/glkrvp. TODO: Fix as per octopus schematic. Change-Id: Ic8c25b3fafbfef31b8b3b802acb3bc53ee7146b6 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/23685 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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