Age | Commit message (Collapse) | Author | |
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2016-06-12 | mt8173: dram: Add more sample points to improve dram timing margin | PH Hsu | |
BRANCH=none BUG=chrome-os-partner:52959 TEST=verified on elm-EVT SKU1/SKU2, Oak-rev5 2GB/4GB models. Change-Id: I228c629d9a3d6cd8fc5c4e8ba24cc52d5283b4e6 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 3c19e7d Original-Change-Id: I22356aa8d196c4c126742cfc7e85cc693acd9b39 Original-Signed-off-by: PH Hsu <ph.hsu@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/347716 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15115 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> | |||
2016-05-09 | google/oak: Add Samsung K4E6E304EB 4G LPDDR3 SDRAM for elm-rev1 SKU2 | PH Hsu | |
BUG=none BRANCH=none TEST=emerge-elm coreboot Change-Id: Ib40076f2bb1516fe222e52e18592c15073c9d288 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 84d188543a9e949f7bf792ba704263a0bf97aa51 Original-Change-Id: I43ea6f07f5e337ca3bc5c5c4b3d56c89e5e0ca98 Original-Signed-off-by: PH Hsu <ph.hsu@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/338212 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14695 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |