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They're listed in AUTHORS and often incorrect anyway, for example:
- What's a "Copyright $year-present"?
- Which incarnation of Google (Inc, LLC, ...) is the current
copyright holder?
- People sometimes have their editor auto-add themselves to files even
though they only deleted stuff
- Or they let the editor automatically update the copyright year,
because why not?
- Who is the copyright holder "The coreboot project Authors"?
- Or "Generated Code"?
Sidestep all these issues by simply not putting these notices in
individual files, let's list all copyright holders in AUTHORS instead
and use the git history to deal with the rest.
Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.
This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.
Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;
Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.
However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.
util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
-a \! -name \*.patch \
-a \! -name \*_shipped \
-a \! -name LICENSE_GPL \
-a \! -name LGPL.txt \
-a \! -name COPYING \
-a \! -name DISCLAIMER \
-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +
Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
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- Hynix H5TC4G63CFR-PBA, ramcode = 5
BUG=chrome-os-partner:34695
TEST=emerged coreboot, booted successfully into kernel.
Change-Id: I53f9ebd9c38c645d1eb8b685d39e8beb55bd3c6a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ee6fdcc28402fe324d08b713498488d863d1d30f
Original-Change-Id: I829d4e1f992eadd445c313729eb4bca5ce602f53
Original-Reviewed-on: https://chromium-review.googlesource.com/245947
Original-Reviewed-by: Neil Chen <neilc%nvidia.com@gtempaccount.com>
Original-Tested-by: Neil Chen <neilc%nvidia.com@gtempaccount.com>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Neil Chen <neilc%nvidia.com@gtempaccount.com>
Reviewed-on: http://review.coreboot.org/9736
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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This change updated the EMC tables with emc_reg_tool 5.0.18,
for below memory SKUs:
- Hynix H5TC4G63AFR-PBR 2GB, ramcode = 0
- Micron MT41K256M16HA-125 2GB, ramcode = 1
- Samsung K4B4G1646Q-HYK0 2GB, ramcode = 2
- Hynix H5TC8G63AFR-PBR 4GB, ramcode = 8
- Micron MT41K512M16TNA-125 4GB, ramcode = 9
- Samsung K4B8G1646Q-MYKO 4GB, ramcode = 10
BUG=chrome-os-partner:30963
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Change-Id: Iee329ff09e35cddd3c868c0460a38ef56b2ac5bb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 158872ff7c0dd5274cfa8d63ec17b4423a4592ce
Original-Change-Id: I44adfdb5b433e37e2d25095acdcce3d9c14eb897
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/210024
Original-Tested-by: Ken Chang <kenc@nvidia.com>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: http://review.coreboot.org/9116
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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This change updates the cfg file for Hynix/Micron/Samsung 4GB,
792MHz DRAM based on the data generated by t124_emc_reg_tool.
BUG=none
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Original-Change-Id: I7621e60d8dcc568e0bb400a6c96b7f8909a15aa6
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/202059
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit 04e74d2fb0fefa6a1786225638380c8831bd9481)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I6615e34a17bb372eda9dd0844ecddbcde902ad7c
Reviewed-on: http://review.coreboot.org/8008
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
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This change updates the cfg file for Micron/Samsung 2GB,
792MHz DRAM based on the data generated by t124_emc_reg_tool.
BUG=none
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Original-Change-Id: I840cdd967c3b38479946a497a91da89bef5a98ad
Original-Signed-off-by: Jerry Wang <jerryw@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/199296
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
(cherry picked from commit cb70674c6551c8c36d2fd2d220e0f677ed2c6b24)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I11222bc1453a76cc27c2be169be5d3481ed7cfe7
Reviewed-on: http://review.coreboot.org/7902
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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The original sdram-hynix-2GB-792.inc was just copied from nyan
bct file. This change updates the cfg file for Hynix 2GB, 792MHz
DRAM based on the data generated by t124_emc_reg_tool.
BUG=none
BRANCH=blaze
TEST=emerged coreboot, booted successfully into kernel.
Original-Change-Id: I9534b4df6d35193179de124309df12ed830098a0
Original-Signed-off-by: Ken Chang <kenc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/197660
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 797dabe54f2679bb5717961dda1947df453eb0f1)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ie67bedb29d5d9c3a3b58d949ddf9600716c385ec
Reviewed-on: http://review.coreboot.org/7898
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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hynix-2GB-204MHz/hynix-4GB-204MHz are not workable with Samsung RAMCODE.
To replace them by samsung-2GB-204/samsung-4GB-204 for bring up purpose.
BRANCH=none
BUG=chrome-os-partner:27682
TEST=emerge-nyan_blaze coreboot builds OK; flash to blaze board and
boot to kernel successfully with all the RAMCODE
Original-Change-Id: I7c2a96e84e6988dd739a9621ff93edc01703306a
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/195396
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
(cherry picked from commit dc028c408be58f036fe125abc2e49e2c0cde0aa8)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ieeb0250e42fb48c6089bc8dc95550c9b1694d7f8
Reviewed-on: http://review.coreboot.org/7772
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
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RAM module for RAMCODE 0010 (K4B4G1646Q) does not work with
hynix-2GB-204MHz configuration. We need to replace it by
hynix-2GB-792MHz. Also updated hynix-2GB-792MHz configuration
from Nyan board folder. This commit is only for bring up stage.
Once finish dram stress test, will update it again.
BRANCH=none
BUG=chrome-os-partner:27682
TEST=emerge-nyan_blaze coreboot builds OK; flash to blaze board and
boot to kernel successfully
Original-Change-Id: Idfc503c944ac6120c92a4cf329f3fbe63b2c2a1c
Original-Signed-off-by: Neil Chen <neilc@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/193737
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
(cherry picked from commit 91f21aa0cf9251b825e42d946d8cd41849c57447)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I6293fa638c5b2577e502ba34a3cc6e6d5b7f2fdb
Reviewed-on: http://review.coreboot.org/7742
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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The nyan_blaze board will have different BCT .inc files, to be
added/updated later. GPIOs and some devicetree stuff may also differ.
BUG=None
TEST=Built nyan, nyan_big and nyan_blaze.
BRANCH=None
Original-Change-Id: I8b16fc71346cf973983aa046096b79cb83ad4bb6
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/190721
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit bea753131e2247a90cc5359fa5f603026d66c7ce)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I435ae78da2f6c4f1a78fea8300b6285e52272535
Reviewed-on: http://review.coreboot.org/7453
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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