summaryrefslogtreecommitdiff
path: root/src/mainboard/google/kukui/Kconfig
AgeCommit message (Collapse)Author
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2020-01-14mb/google/kukui: Support panels using ANX7625Hung-Te Lin
For Kukui followers using ANX7625 eDP bridge to access panel. BUG=b:140132295 TEST=make # board = kukui Change-Id: I7dc9c68d076fd0ba4e963cde9414d25c17b332cb Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36767 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-23Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi
Kconfig became stricter on what it accepts, so accomodate before updating to a new release. Change-Id: I92a9e9bf0d557a7532ba533cd7776c48f2488f91 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2019-11-15mb/google/kukui: Add new board 'kakadu'Hung-Te Lin
Add a new Kukui follower 'kakadu'. BUG=None TEST=make # select kakadu Change-Id: I9f25ce90285828c43435e45d9361ee7128d407fa Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36848 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-12mb/google/kukui: Add new configs 'damu' and 'kappa'Hung-Te Lin
New boards introduced to Kukui family. BUG=None TEST=make # select damu and kappa Change-Id: I7154aeee921114b7d12bf586adca250df19a3883 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-01mb/google/kukui: Unselect FATAL_ASSERTElyes HAOUAS
FATAL_ASSERT is used for debugging purpos. Don't select it by default. Change-Id: If4d521827f3d50fb662b89b24d00fb0517e7af2d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-09-30mb: remove test-only HWIDsHung-Te Lin
The CONFIG_GBB_HWID can be generated automatically now so we can remove the test-only HWIDs set in board config files. BUG=b:140067412 TEST=Built few boards (kukui, cheza, octopus) and checked HWID: futility gbb -g coreboot.rom Change-Id: I4070f09d29c5601dff1587fed8c60714eb2558b7 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35635 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-25mb/google/kukui: Add new build target 'Juniper'Hung-Te Lin
Add the configuration 'Juniper' for the new mainboard. BUG=b:137517228 TEST=make menuconfig; select 'juniper' and build Change-Id: I94e3ac7f6de3fecf177e344cb217eaecf6362d69 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-09-10mb/google/kukui: Enable MT8183_DRAM_EMCPHuayang Duan
MT8183_DRAM_EMCP is enabled for devices using eMCP to run at a high DRAM frequency (e.g., 3600Mbps). BUG=b:80501386 BRANCH=none TEST=Memory test passes on EMCP platform Change-Id: Icf875427347418f796cbf193070bf047844d2267 Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34433 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-26google/kukui: Enable CHROMEOS_USE_EC_WATCHDOG_FLAGYu-Ping Wu
Kukui AP doesn't remember if the last AP reset was due to AP watchdog. We need to enable CHROMEOS_USE_EC_WATCHDOG_FLAG so that it will query the reset reason from EC. BUG=b:109900671,b:118654976 BRANCH=none TEST=1. run 'mosys eventlog clear; stop daisydog; echo > /dev/watchdog' 2. wait for watchdog reset 3. check 'mosys eventlog list | grep watchdog' Change-Id: I053cc7664bbaf0d3fcae26ba9481a0ad700dca90 Signed-off-by: You-Cheng Syu <youcheng@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-08-15mb/google/kukui: Support eDP panels via PS8640Hung-Te Lin
Some Kukui variants may have eDP panels connected via a PS8640 MIPI bridge which we may retrieve EDID dynamically. BUG=b:b:137517228 TEST=emerge-jacuzzi coreboot chromeos-bootimage; boots and see display. Change-Id: I85aac5255e6a3e6019299670486214ecffbf9801 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34516 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-31mb/google/kukui: Enable config for coreboot displayYongqiang Niu
BUG=b:80501386,b:117254947 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I478e06686158dd77b075bcef8a41763ae26c79f9 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31521 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-21mb/google/kukui: Introduce a new 'Jacuzzi' familyHung-Te Lin
The 'Jacuzzi' is a different base board that will share most of Kukui design. For AP firmware, there will be only a few changes expected, mostly in display (for MIPI bridge) and EC/keyboard so we want to create it as variants inside Kukui folder, not forking a new directory. BUG=b:137517228 TEST=make menuconfig; select 'krane' and build; select 'jacuzzi' and build. Change-Id: Ic2b04e01628dc3db40f79f9bbdd5cc77d9466753 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34344 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-16mediatek/mt8183: add a new configuration for KodamaPeichao Wang
These configuration files can be used to build Kodama firmware. BUG=b:135490566 TEST=check variant: kodama via make menuconfig; make -j Change-Id: I72e80e800ba041df1dda2b0f84470d1ef58bc946 Signed-off-by: Peichao Wang <peichao.wang@bitland.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33616 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-21google/kukui: Enable RTCYou-Cheng Syu
Enable RTC so that we can see correct timestamp in CrOS eventlogs. BUG=b:134461866 TEST='mosys eventlog list' shows correct timestamp on Kukui Change-Id: Ie9ef7c9343c781e348429cd5376a4a5519641e16 Signed-off-by: You-Cheng Syu <youcheng@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2019-04-11google/kukui: Add variant 'Krane'Hung-Te Lin
Add the new configuration 'Krane' that will need at least its own EC. There's currently no difference in coreboot side. BUG=b:130011505 TEST=make menuconfig; make -j # select board=Krane BRANCH=None Change-Id: Ibb2ec42b08f9a51b22c22f3fe99b203f5eb31627 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-02-05mb/google/kukui: Add default HWID for Chrome OSHung-Te Lin
The default value for Chrome OS HWID should be different. Calculated as HWID v1. BUG=b:123336677 BRANCH=kukui TEST=build and boots properly. Change-Id: I39c640562c1c3b117292b8abacd36a4a9c2fa6c6 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/31088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-01-29google/kukui: Implement HW reset functionTristan Shieh
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW reset for SoC and H1. BUG=b:80501386 BRANCH=none TEST=emerge-kukui coreboot; manually verified the do_board_reset() on Kukui P1 Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/31118 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-29mediatek: Separate WDT reset function from WDT driverTristan Shieh
Separate WDT reset function from WDT driver, then we can use the common WDT driver and have a board-specific reset function on different boards. In Kukui, we plan to use GPIO HW reset, instead of WDT reset. Add config "MISSING_BOARD_RESET" in Kukui to pass the build for now. BUG=b:80501386 BRANCH=none TEST=emerge-elm coreboot; emerge-kukui coreboot; Change-Id: Ica07fe3a027cd7e9eb6d10202c3ef3ed7bea00c2 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/31121 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-13mb/google/kukui: add flapjack on top of kukuiYH Lin
Add placeholder for future flapjack additions/modifications. BUG=None BRANCH=kukui TEST=build with kukui/flapjack configurations Signed-off-by: YH Lin <yueherngl@google.com> Change-Id: Ib9cd39e284f19b9179da73ed9f2b13d97442960e Reviewed-on: https://review.coreboot.org/c/30859 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-10google/kukui: Correct boardid sources and add sku_idHung-Te Lin
Kukui is going to use ADC#4 as SKU ID, and utilizing EC BoardID as global board_id (i.e., board revision). BUG=b:122060615 TEST=make; manually tested on Kukui P1 board. Change-Id: I7bba368c141a7ba6db11f24b8e8e7158f0fc729e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/30617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-01-09google/kukui: Enable VBOOT_VBNV_FLASH to store VBNV in flashTristan Shieh
Reading nvdata from non-volatile flash storage. With this patch, it will pass the firmware test that corrupts FW_MAIN_A and boots up with FW_MAIN_B. BUG=b:80501386 BRANCH=none Test=test_that --board=kukui 172.23.213.147 firmware_CorruptFwSigA Change-Id: I9ef6bff019ee986ff018202bfd4d4a875526ec6c Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/30701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2018-12-05google/kukui: Support TPMTristan Shieh
Init SPI bus 0 to connect TPM, configure interrupt type of GPIO CR50_IRQ, implement tis_plat_irq_status(), and set up chromeos GPIO table for TPM interrupt. BUG=b:80501386 BRANCH=none Test=Boots correctly on Kukui. Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/c/29192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-10-25google/kukui: Support recovery modeTristan Shieh
Get recovery mode switch from EC and pass it to payload. BUG=b:80501386 BRANCH=none Test: Boots correctly on Kukui. Change-Id: Ib92afca885e5a97ec4646f55f2279ef56a61af5a Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/29190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2018-08-28google/kukui: Init SPI bus for ECTristan Shieh
Set EC SPI bus config and init SPI bus according to the config. BUG=b:80501386 BRANCH=none TEST=EC is not working yet. This makes depthcharge go forward a little. Change-Id: Id9209b6429417430cfcf7f5a5a1659e7e4bc7866 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/28251 Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-27google/kukui: Add SPI NOR supportTristan Shieh
This patch sets SPI flash related configs and inits SPI bus 1 to support SPI NOR flash. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: I1a18a456f41a7c7daec954e961c9fbee3650493d Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27499 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-11google/kukui: Add MediaTek MT8183 reference boardTristan Shieh
BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: I08644892d34925574f791b000b0035d5afad7022 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26722 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 17:18:45 +0000