coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-12-09	mainboard/google/kahlee: Update PCIe port map	Martin Roth
2017-12-06	google/kahlee: Set USB OC pins	Marc Jones
2017-12-02	mainboard/google/kahlee: Remove usb_oc.asl files	Martin Roth
2017-11-29	google/kahlee: Add SPD function	Marc Jones
2017-11-28	mainboard/google/kahlee: Update Grunt for 16MB ROM chip	Martin Roth
2017-11-20	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones
2017-11-19	mb/google/kahlee: Move ec.h into variant include directories	Martin Roth
2017-11-19	mainboard/google/kahlee: Update memory.c	Martin Roth
2017-11-15	variants/kahlee: Add thermal ASL	Marc Jones
2017-11-14	mb/google/kahlee: Remove direct AGESA header includes	Martin Roth
2017-11-13	mb/google/kahlee: Add getter function for GPIO array	Martin Roth
2017-11-13	mb/google/kahlee: Remove mainboard.h	Martin Roth
2017-11-10	google/kahlee: Use devicetree register values for UMA	Marshall Dawson
2017-11-10	google/kahlee: Move DRAM clear override to devicetree	Marshall Dawson
2017-11-09	mainboard/google/kahlee: Move usb_oc.asl into variant/acpi	Martin Roth
2017-11-09	mainboard/google/kahlee: Define MEM_CONFIG3 for Kahlee variant	Martin Roth
2017-11-03	mainboard/google/kahlee: Prepare for variants	Martin Roth