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bootblock.c
Age
Commit message (
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Author
2019-06-06
soc/amd/stoneyridge: Move LPC support to common
Marshall Dawson
2019-06-06
soc/amd/stoneyridge: Move GPIO support to common
Marshall Dawson
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2018-07-16
mainboard/google/kahlee: Add support for Dediprog em100
Simon Glass
2018-06-08
mainboard/google/kahlee: Use 66MHz SPI clock for fast read
Martin Roth
2018-05-27
stoneyridge GPIO: Create and use PAD_INT for interrupt pins
Richard Spiegel
2018-05-02
google/kahlee: Set SPI 100 MHz and SPI Dual Read IO mode
Marc Jones
2018-04-26
mainboard/google/kahlee: Set SPI speed in bootblock
Marc Jones
2018-04-20
soc/amd/stoneyridge/include/soc/southbridge.c: Rename gpio structure
Richard Spiegel
2018-04-11
src/amd/stoneyridge: Fix a typo (EDGEL_TRIG -> EDGE_TRIG)
Jonathan Neuschäfer
2018-03-20
mainboard/google/kahlee: Initialize EC earlier in the bootblock
Martin Roth
2018-03-01
mb/{amd/gardenia,google/kahlee}: Initialize GPIOs earlier
Justin TerAvest
2018-02-21
mainboard/google/kahlee: Add tis_plat_irq_status
Chris Ching
2018-02-17
soc/amd/stoneyridge: Normalize GPIO init
Justin TerAvest
2017-11-19
mb/google/kahlee: Move ec.h into variant include directories
Martin Roth
2017-08-14
stoneyridge: Rename hudson to southbridge
Marc Jones
2017-07-31
google/kahlee: Enable TPM
Marc Jones
2017-07-27
google/kahlee: Add ChromeOS and ChromeEC
Marshall Dawson