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Before the system enters S0ix or S3, each GPIO community
will have its dynamic clock gating turned on. Upon return
to S0, the dynamic clock gating will be turned back off.
BUG=b:130764684
BRANCH=none
TEST=Used dut-power to verify that the clock gating is enabled
in S0ix and S3. Also used Store(..., Debug) statements in the
ASL code to verify it was getting called.
Change-Id: I20ff2aac035eaa5912af6c946d837567a4918bbf
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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