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There are two ways to control backlight in geralt:
1. MIPI/eDP panel => control backlight via the GPIOs.
(`backlight chip enable` and `PWM dimming control`)
2. eDP OLED panel => enable backlight via `backlight chip enable` and
control dimming over AUX.
For MIPI/eDP panels(#1), both "backlight enable" and "PWM control" GPIOs
will be passed from coreboot. For eDP OLED panel(#2), only the
"backlight enable" GPIO will be passed. If depthcharge successfully gets
the GPIOs, it will use them to control backlight.
BUG=b:244208960
TEST=test firmware display pass for eDP and MIPI panels on MT8188 EVB
Change-Id: I866fa219722241008e2b0d566b29edf2f6d9321f
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70744
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Configure ChromeOS specific GPIOs:
- Open-drain pins to high-z mode:
GPIO_EC_AP_INT_ODL, GPIO_GSC_AP_INT_ODL and GPIO_WP_ODL.
- GPO mode:
GPIO_AP_EC_WARM_RST_REQ, GPIO_EN_SPKR and GPIO_XHCI_INIT_DONE.
This patch is based on MT8188G_GPIO_Formal_Application_Spec_V0.3.
TEST=build pass
BUG=b:236331724
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I84d3f62ec8a3966fe1982d5d4cf6ff270450d4bf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66274
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Initialize I2C bus 1 for TPM control.
TEST=build pass
BUG=b:236331724
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: If5807c9bb39260315ecbc55305def483bd2b8c51
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66273
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Initialize SPI bus 0 for Chrome EC control.
TEST=build pass
BUG=b:236331724
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I6de5ea8a0273a3b0c725e4cdbcf69f4db74c5db7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Add mainboard folder and drivers for new reference board 'Geralt'.
TEST=saw the coreboot uart log to bootblock
BUG=b:233720142
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I5e437d46097369bef535ff64e6a693b7cf67f2f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65586
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@chromium.org>
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