coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-12-16	src/soc/intel/cannonlake: Bump MAX_CPU from 8->12	Edward O'Callaghan
2019-12-16	mb/g/drallion: Remove Wilco 1.0 CML variants from drallion code	Mike Wiitala
2019-12-02	mb/g/drallion: Enable privacy screen on Drallion variant	Mathew King
2019-11-28	mb///Kconfig: Drop redundant redeclaration of MAINBOARD_VENDOR	Arthur Heymans
2019-10-09	mb/google/drallion: Enable UART console for arcada_cml and sarien_cml	Bernardo Perez Priego
2019-09-30	mb: remove test-only HWIDs	Hung-Te Lin
2019-09-28	mb/google/drallion: Set UART for console to UART controller 0	Aamir Bohra
2019-08-29	mb/google/drallion: Correct drallion HWID and add HWID for variants	Mathew King
2019-08-28	mb/google/drallion: remove GBE file	Eric Lai
2019-08-28	mb/google/drallion: add dummy SPD file	Eric Lai
2019-08-23	mb/google/drallion: Add two variants - arcada_cml & sarien_cml	Thejaswani Putta
2019-08-05	mb/google/drallion: Add new mainboard	Thejaswani Putta