coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-04-14	mb/google/deltaur: Enable Melfas touch screen for Deltan	Eric Lai
	Reference Drallion to add device tree for Melfas touch screen. BUG=b:152924290 Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I7b0a42119891c6c2d5978d7f33eefffa2d62df76 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-04-13	mb/google/deltaur: Add support to enable GbE on variant	Varun Joshi
	- Configure devicetree for enabling GbE on variant and remove from baseboard. - Configure Kconfig to enable GbE region. - Configure fmd to incorporate GbE. BUG=b:151102809 Cq-Depend: chrome-internal:2843183 Signed-off-by: Varun Joshi <varun.joshi@intel.corp-partner.google.com> Change-Id: I1c36b132546049e3e775585c41164072f4ece73e Reviewed-on: https://review.coreboot.org/c/coreboot/+/40001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
2020-04-13	mb/google/deltaur: Return SKU ID info	Anil Kumar
	For Deltaur and Deltan variants return proper SKU ID based on EC firmware type and sensor detect GPIO value BUG=b:152544516 TEST=make build successful for deltan Change-Id: I20a497739e5062400b093648c3a634203dec6105 Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39868 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2020-04-13	mb/google/deltaur: Update onboard memory config	Varun Joshi
	Update dq, dqs map based on deltan schematics. Configure memory to read SPD. BUG=b:151702387 Signed-off-by: Varun Joshi <varun.joshi@intel.corp-partner.google.com> Change-Id: I29059f09dd08c81b5ca5fe1215f33871835703fe Reviewed-on: https://review.coreboot.org/c/coreboot/+/39848 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-04-02	Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`	Nico Huber
	These two identifiers were always very confusing. We're not filling and injecting generators. We are filling SSDTs and injecting into the DSDT. So drop the `_generator` suffix. Hopefully, this also makes ACPI look a little less scary. Change-Id: I6f0e79632c9c855f38fe24c0186388a25990c44d Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39977 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: David Guckian Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-30	mb/google/deltaur: Provide initial devicetree	Tim Wawrzynczak
	This initial devicetree attempts to correctly configure the status of each PCI device. Not all required drivers are instantiated, nor are all of the SoC options fully selected yet. PCIe root ports are enabled and clocks are assigned. USB ports are assigned. BUG=b:150165131 BRANCH=none TEST=util/abuild/abuild -p none -t google/deltaur -x -a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I911ec08b0db3647d131113a138fb74a55612fd62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2020-03-30	mb/google/deltaur: Add initial GPIO configuration	Tim Wawrzynczak
	This configuration sets up all of the GPIO pads for the first rev of the board. BUG=b:150165131 BRANCH=none TEST=util/abuild/abuild -p none -t google/deltaur -x -a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I4f6398808809492dcb345ccaa09e199fa35e40cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/39674 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2020-03-30	mb/google/deltaur: add deltaur mainboard initial support	Bora Guvendik
	Created a new Google baseboard using Tiger Lake named deltaur, taking volteer as a starting point. BUG=b:151102807 TEST=make build successful Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: Ib98f328df22f39e7d9d625a3292954881ee15b15 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>