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Change lp4x spd names to include lp4x memory type (eg. lp4x-spd-1.hex).
BUG=b:160157545
TEST=run gen_part_id for volteer variants and verify that it changed
spd names to prepend the "lp4x-" to the filename..
Change-Id: I0c59da7eb78f34640aad2e852ca725d3e8571a8e
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44784
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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BUG=b:155002684
TEST=emerge-dedede coreboot chromeos-bootimage
Change-Id: I89a4a5bbcd26b156a9660f80090bb5c953196b84
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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Add charger input current throttling for drawcia system
BUG=None
BRANCH=None
TEST=Built and tested on drawcia system
Change-Id: I34fdc23fcd84b5c27c2bada769f7a9049c2a56a5
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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Add DTT (Dynamic Tuning Technology) support on Jasper Lake based drawcia
system. Add information on sensors, power limits and tcc_offset for DTT
based thermal control.
BRANCH=None
BUG=b:161993459
TEST=Built for dedede system
Change-Id: If50052864fb246a6a8f7d96fa50529e5f55968c0
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44148
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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BUG=b:155002684
TEST=build drawcia, and check touchscreen can work
Change-Id: I29a891e07bb3c1d8ebe17666c18bfcf3bc1c361d
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Add supported memory parts in the mem_list_variant.txt and generate the
SPD ID for the parts. The memory parts being added are:
H9HCNNNBKMMLXR-NEE
K4U6E3S4AA-MGCR
BUG=None
TEST=Build the drawcia board.
Change-Id: Id05c0b2a87b64bfedc761949cbc8ad6cf7dd73a5
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43505
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Marco Chen <marcochen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Since there is now a mechanism to generate DPTF ACPI tables and methods
at runtime, dedede should switch to using that instead of raw ASL files.
This patch converts the existing .asl files into devicetree entries.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I6bb6e6e15f50a1e510080e16bbca09dfc5f16b1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43422
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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BUG=b:160741778
TEST=build drawcia, and check camera can be regconized
Change-Id: I67bee9773b53451653abd76088d1d4062fe3da8f
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42929
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Select the drivers for ALC5682 codec and MX98360A spk amp
BUG=b:158202026
TEST=FW_NAME=drawcia emerge-dedede coreboot chromeos-bootimage
Change-Id: If271f11f10a85ade6f61ff8c25bfafeb67a69af6
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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BUG=b:155002684
TEST=build drawcia, and check touchscreen can work
Change-Id: Ib6a190d2f6fc5132af0e58c6df9919381e88f699
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42923
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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BUG=b:155002811
TEST=build drawcia, and check touchpad can work.
Change-Id: I674236aa6937a0444a85e6b8e2fb9a7925b56f5c
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42922
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Enable DPTF functionality on jasperlake based dedede platform
BRANCH=None
BUG=None
TEST=Built for dedede system
Change-Id: I17b6e4e96abee6181b0d1f94c356a32aa82c19b9
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41668
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add initial support for drawcia
BUG=b:158540280
BRANCH=None
TEST=build
Change-Id: Ic775bb2a93581e422379ca90127e3581bbf3c89e
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Marco Chen <marcochen@google.com>
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