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path: root/src/mainboard/google/chell/spd
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2016-01-19google/chell: Add new memory part for DVT buildDuncan Laurie
After comparing datasheets it appears to have the same geometry and timings as the K4E6E304EE-EGCF part with just a new part number. BUG=chrome-os-partner:49357 BRANCH=glados TEST=build and boot on chell EVT (new part is not used until DVT) Change-Id: Ia1e67080b1d79600e00c3ea8bee088ecafea2ab2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fb1488ca5ff780b5f1f937dbf0d23610c28204b2 Original-Change-Id: I09e1ce1a45a217afc88f422cf7db7924fad6b6f9 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/321956 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13011 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-01-15google/chell: Fix the P/N number for samsung K4E6E304EE-EGCFWisley
modify the P/N in samsung K4E6E304EE-EGCF SPD from K4E6E304ED-EGCE to K4E6E304EE-EGCF BRANCH=none BUG=chrome-os-partner:48299 TEST=build chell and use gooftool to probe and P/N match Change-Id: Ie560e5c0d4b9a3cfb34c3856911930fb8159764e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dabe5eaa8abf54f4e4a5492062adca6ef9b4634d Original-Change-Id: Ie8d44ac6032e5213928bfae2a2ac5877d4193d62 Original-Signed-off-by: Wisley <wisley.chen@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/316100 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/12951 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-11google/chell: Add SPD for new memory typeDuncan Laurie
This adds the SPD for SK-Hynix H9CCNNNCLTMLAR memory to be used in the EVT build. BUG=chrome-os-partner:47346 BRANCH=none TEST=emerge-chell coreboot Change-Id: I45d0840e43ed81d8286b005f0a99b014b7f0cf28 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1e917440141c586cb370147f9c5b782d6e77ea10 Original-Change-Id: I02f1349f38d83f4a09887adf81384b5a8f475dd0 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/311214 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12391 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-27google/chell: fix hynix spd dataAaron Durbin
Spreadsheet as built indicates: Samsung 4*8Gb - K4E8E304EE-EGCF - 0b0000 Samsung 4*16Gb - K4E6E304EE-EGCF - 0b0001 Hynix 4*8Gb H9CCNNN8GTMLAR-NUD - 0b0010 Hynix 4*16Gb H9CCNNNBJTMLAR-NUD - 0b0011 Adjust the Hynix spds to match accordingly. BUG=chrome-os-partner:46573 TEST=None BRANCH=None Change-Id: I2ae0335af3557c787cced899bfb80db045f99cd0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 35ed2b0a5af53203480c726b875875d7c2cfd855 Original-Change-Id: I3cb38b28c454fbd60b776954c377b4559c6efebd Original-Signed-off-by: Aaron Durbin <adurbin@chromium.orG> Original-Reviewed-on: https://chromium-review.googlesource.com/306580 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/12159 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-27google/chell: Add new mainboard for chellDuncan Laurie
This is based on glados with minor changes: - updated GPIOs based on schematic - add _PRW for trackpad wake now that it is on a new GPIO - add SPD for new memory config - disable ALS BUG=chrome-os-partner:46289 BRANCH=none TEST=emerge-chell coreboot Change-Id: Id5746bf2b5b26000fcc3f029b901bfe29b788dac Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 9c5ebe98cf599ba80aac5e9ef238b7996789a819 Original-Change-Id: I75efda64a50b0e6e4a5c9008ce05d76c1e605b0c Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/304927 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12151 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-27google/chell: copy glados to chellDuncan Laurie
Only change is renaming all occurrences of glados to chell, keeping capitalization. Change-Id: I8b1a3efd03d415f27c8872827f8687babbc539f7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/12150 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>