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path: root/src/mainboard/google/brya
AgeCommit message (Expand)Author
2021-04-02mainboard/google/brya: Disable touchpad as S3 wake sourceBoris Mittelberg
2021-04-02mainboard/google/brya: Enable tight timestampBoris Mittelberg
2021-04-02mb/google/brya: change reset signal for GPP_F17 from PLTRST to DEEPBoris Mittelberg
2021-03-26mb/google/brya: Update ddr configSubrata Banik
2021-03-22mb/google/brya: Enable S0ixSugnan Prabhu S
2021-03-18mb/google/brya: Implement SLP_S0_GATE signalTim Wawrzynczak
2021-03-15mb/google/brya: Remove BT PCI interface and add BT flagCliff Huang
2021-03-15mb/google/brya: Select ADL_ENABLE_USB4_PCIE_RESOURCES for brya0Tim Wawrzynczak
2021-03-09mb/google/brya: Define ChromeOS GPIO support in ACPI tbalesTim Wawrzynczak
2021-03-09mb/google/brya: Reorganize flashmapTim Wawrzynczak
2021-03-08mb/google/brya: Add Board and SKU ID support from Chrome ECTim Wawrzynczak
2021-03-08mb/google/brya: Finish support for ChromeOS GPIOsTim Wawrzynczak
2021-03-06mb/google/brya: Move GPE configuration to baseboard/devicetree.cbFurquan Shaikh
2021-03-06mb/google/brya: Fix MAINBOARD_PART_NUMBERFurquan Shaikh
2021-03-05soc/intel/adl, mb/google/brya: Add IPU to devicetreeTim Wawrzynczak
2021-03-05mb/google/brya: Add IPU ASL to DSDTTim Wawrzynczak
2021-03-05mb/google/brya: brya0: Add ACPI support for Type-C portsTim Wawrzynczak
2021-03-03mb/google/brya: Add support for 2 new DRAM partsAmanda Huang
2021-03-03mb/google/brya: fix BT enumeration issueAamir Bohra
2021-03-02mb/google/brya: Fix a few mistakes in brya0 overridetreeTim Wawrzynczak
2021-02-27mb/google/brya: add HAS_RECOVERY_MRC_CACHE flagEric Lai
2021-02-22mb/google/brya: Fix chip driver and HID for Cr50 TPMTim Wawrzynczak
2021-02-18mb/google/brya: Enable MLB USB Type-A PortTim Wawrzynczak
2021-02-18mb/google/brya: Remove `Some generic macros` commentAngel Pons
2021-02-15mb/google/brya: Add EC I/O decode windowsTim Wawrzynczak
2021-02-15mb/google/brya: Enable cr50 supportTim Wawrzynczak
2021-02-05mb/google/brya: Add support for Hynix H9HCNNNBKMMLXR-NEE LP4x DRAMTim Wawrzynczak
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-04mainboards: Remove default CHROMEOS=yKyösti Mälkki
2021-02-01mb/google/brya: Initiate peripheral busesEric Lai
2021-02-01mb/google/brya: Change EC -> PCH wake pin to GPP_F17Boris Mittelberg
2021-01-28mb/google/brya: Add variants overridetree.cb path and remove unused registersEric Lai
2021-01-28ACPI: Move include for <vc/google/chromeos.asl>Kyösti Mälkki
2021-01-27mb/google/brya/var/brya0: Use auto-generated Makefile.incAmanda Huang
2021-01-27ACPI: Add top-level ASLKyösti Mälkki
2021-01-26mb/google/brya: Add memory DQ mapEric Lai
2021-01-24arch/x86: Use wildcard for mb/smihandler.cKyösti Mälkki
2021-01-12mb/google/brya: Initialize overridetree.cbEric Lai
2021-01-12mb/google/brya: Add gpio tableEric Lai
2020-12-29Revert "mb/google/brya: Initiate peripheral buses"Felix Singer
2020-12-29mb/google/brya: Initiate peripheral busesEric Lai
2020-12-04mb/google/brya: Initiate device treeEric Lai
2020-12-04mb/google/brya: Add EC smihandlerEric Lai
2020-12-04mb/google/brya: Enable ECEric Lai
2020-12-04mb/google/brya: Enable building for Chrome OSEric Lai
2020-12-04mb/google/brya: Set UART consoleEric Lai
2020-12-04mb/google/brya: Enable ACPI and add ACPI tableEric Lai
2020-12-02mb/google/brya: Add GPIO stubsEric Lai
2020-12-02mb/google/brya: Add entry stubs of each stageEric Lai
2020-12-02mb/google/brya: Add flashmap descriptorEric Lai
2020-11-22mb/google/brya: Add new google brya mainboardTim Wawrzynczak
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 05:31:18 +0000