coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-05	soc/intel/alderlake: Refactor PCIE port config	Eric Lai
2021-02-01	mb/google/brya: Initiate peripheral buses	Eric Lai
2021-02-01	mb/google/brya: Change EC -> PCH wake pin to GPP_F17	Boris Mittelberg
2021-01-28	mb/google/brya: Add variants overridetree.cb path and remove unused registers	Eric Lai
2021-01-27	mb/google/brya/var/brya0: Use auto-generated Makefile.inc	Amanda Huang
2021-01-26	mb/google/brya: Add memory DQ map	Eric Lai
2021-01-12	mb/google/brya: Initialize overridetree.cb	Eric Lai
2021-01-12	mb/google/brya: Add gpio table	Eric Lai
2020-12-29	Revert "mb/google/brya: Initiate peripheral buses"	Felix Singer
2020-12-29	mb/google/brya: Initiate peripheral buses	Eric Lai
2020-12-04	mb/google/brya: Initiate device tree	Eric Lai
2020-12-04	mb/google/brya: Enable EC	Eric Lai
2020-12-04	mb/google/brya: Enable building for Chrome OS	Eric Lai
2020-12-02	mb/google/brya: Add GPIO stubs	Eric Lai
2020-12-02	mb/google/brya: Add entry stubs of each stage	Eric Lai
2020-11-22	mb/google/brya: Add new google brya mainboard	Tim Wawrzynczak