| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-01-11 | soc/intel/alderlake: Factor out A0 stepping workaround | Angel Pons |
| 2022-01-11 | mb/google/brya: Check if descriptor is writable | Angel Pons |
| 2022-01-11 | mb/google/brya/bootblock.c: Sync cosmetics with adlrvp | Angel Pons |
| 2022-01-11 | mb/google/brya: Restructure PMC descriptor update | Angel Pons |
| 2022-01-01 | src: Remove duplicated includes | Elyes HAOUAS |
| 2021-07-19 | mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h' | Subrata Banik |
| 2021-06-11 | mb/google/brya: Update PMC Descriptor for Alder lake A0(0x906a0) silicon | Sridhar Siricilla |
| 2021-04-06 | mb/google/brya: Move early GPIO config earlier | Tim Wawrzynczak |
| 2020-12-02 | mb/google/brya: Add GPIO stubs | Eric Lai |
| 2020-12-02 | mb/google/brya: Add entry stubs of each stage | Eric Lai |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
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