coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2023-11-09	mb/google/brox: Remove use of EC_IN_RW_OD GPIO	Shelley Chen
	Later GSCs don't need a EC_IN_RW GPIO anymore, so removing the use of this for get_ec_is_trusted(). BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I29f94969e9f2c1f239d9f9655f39b8410296f695 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78950 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2023-11-08	mb/google/brox: Configure early GPIOs in bootblock	Shelley Chen
	Some GPIOs (like WP and GSC) need to be configured in bootblock. Making sure that they get configured earlier for this. BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I8dd4853bc05b954f47d858d87ea2aed48e4b8074 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78943 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-11-08	mb/google/brox: Correcting GPIOs based on latest schematics	Shelley Chen
	There are some inaccuracies in arbitrage. This is the first pass at correcting the incorrectly generated configs. I also tried to update the "No heuristic was found useful" comment generated by arbitrage into something more useful (ie: the appropriate NFs). BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I836565e09a3e0b25746b3e2f9ed6610eaacf7e97 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78942 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-11-01	mb/{google,intel}: Update FMD to support CBFS verification	Anil Kumar
	This patch adds the required FMD changes to support the change in cse_lite 'commit Ie0266e50463926b8d377825 ("remove cbfs_unverified_area_map() API in cse_lite")' for CBFS verification. With the change in cse_lite the ME_RW_A/B blobs are now part of FW_MAIN_A/B and corresponding entries in FMD can be removed for boards that currently use them. BUG=b:284382452 Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Change-Id: I3ca88fee181f059852923d50292b24c0e5b9fd6d Reviewed-on: https://review.coreboot.org/c/coreboot/+/78502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-10-26	mb/google/brox: Add Arbitrage generated gpio.c file	Shelley Chen
	Checking in gpio.c generated by arbitrage. Used this command line to generate: arb export-coreboot-gpio --refdes=U1 brox:proto1_20231017 BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I1098bd4cfde393ed9e78cd90158c3534fdf0dc09 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78657 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-26	mb/google/brox: use Alderlake-P SoC instead of Alderlake-S	Shelley Chen
	Skolas is actually using the SOC_INTEL_ALDERLAKE_PCH_P config, so fixing Brox to reflect this as it's using the same SoC. BUG=b:300690448 BRANCH=None TEST=emerge-brox coreboot Change-Id: I632ec055d523956983d2053cd8e7000b1eaabf92 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78656 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-18	mb/google/brox/Kconfig: Don't redefine config option	Felix Singer
	Commit 9b230ae2955 introduced a redefinition of the config option `BOARD_GOOGLE_BROX`, which is already defined in Kconfig.name accordingly and thus causing a Kconfig warning. Fix that by removing the type redefinition. Change-Id: Iea6219a686a23d8d48a0bfb6ac642efd482fded9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78394 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-13	mb/google/brox: Create new Brox baseboard	Shelley Chen
	This CL is just getting the initial brox framework to get the baseboard building. Copied files from brask baseboard and tried to remove contents of some files like the device tree and memory IDs. Added support for memory part "MT62F512M32D2DR-031 WT:B", mapped to DRAM ID 0. BUG=b:300690448 BRANCH=None TEST=./util/abuild/abuild -p none -t GOOGLE_BROX -x -a Change-Id: I929b465646ac4c69d4bab33ce23848c7b1fa0f98 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78009 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>