aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google/beltino/romstage.c
AgeCommit message (Expand)Author
2020-07-12haswell: Move some MRC settings to devicetreeAngel Pons
2020-07-12haswell: Add function to retrieve SPD addressesAngel Pons
2020-07-12haswell: Automatically determine system typeAngel Pons
2020-07-12haswell: Introduce ENABLE_DDR_2X_REFRESH Kconfig optionAngel Pons
2020-07-12haswell boards: Drop unused romstage.c includesAngel Pons
2020-07-12haswell: Factor out `max_ddr3_freq`Angel Pons
2020-07-12haswell: Compute disabled channel masks at runtimeAngel Pons
2020-07-12mb/google/beltino: Factor out common MRC settingsAngel Pons
2020-07-12haswell: Relocate `mainboard_romstage_entry` to northbridgeAngel Pons
2020-07-12haswell boards: Fix writes to 16-bit DxxIR registersAngel Pons
2020-07-12haswell: Drop `struct romstage_params` typeAngel Pons
2020-07-11mb/google/beltino: Move Super I/O init to bootblockAngel Pons
2020-07-09haswell: Drop GPIO indirection layersAngel Pons
2020-07-09mb/google/beltino: Put GPIOs in a C fileAngel Pons
2020-07-09haswell: Turn RCBA configuration into a functionAngel Pons
2020-07-08sb/intel/lynxpoint: Factor out RCBA Function DisableAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-22nb/intel/haswell: Deprecate WDB params in pei_dataAngel Pons
2020-04-06mb/google/beltino: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
2019-11-28mainboard/google: Remove unused include <stdlib.h>Elyes HAOUAS
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-18cpu/intel: Enter romstage without BISTKyösti Mälkki
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-03-06Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-05mainboard: Remove unneeded include <console/console.h>Elyes HAOUAS
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-05-08mb/superio: Rename global control devices as SUPERIO_DEVElyes HAOUAS
2016-11-24Add Haswell Chromeboxes/Chromebase using variant board schemeMatt DeVillier