coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-11-04	sb/intel/lynxpoint: Align LP GPIO ACPI with Broadwell	Angel Pons
2020-11-04	mb/google/beltino: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	mb/google/beltino: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/google: Remove copyright notices	Patrick Georgi
2019-11-04	sb/intel/lynxpoint: Use sb/intel/common/platform.asl	Arthur Heymans
2018-11-30	cpu/intel/haswell: Rework acpi/cpu.asl	Arthur Heymans
2018-11-01	sb/intel/lynxpoint: Add a common platform.asl file	Tristan Corrick
2018-11-01	sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table	Tristan Corrick
2018-10-18	mb: Fix non-local header treated as local	Elyes HAOUAS
2018-07-25	mb/google/x86-boards: Get rid of power button device in coreboot	Furquan Shaikh
2018-06-04	mb/google: Get rid of whitespace before tab	Elyes HAOUAS
2018-06-03	intel bd82x6x/lynxpoint systems: Update ACPI thermal zone handler	Martin Roth
2017-05-31	google/beltino: add board-specific USB port info	Matt DeVillier
2016-11-24	Add Haswell Chromeboxes/Chromebase using variant board scheme	Matt DeVillier