| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-01-24 | mb/google/auron: Use Haswell CPU code | Angel Pons |
| 2021-01-01 | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner |
| 2020-10-30 | soc/intel/broadwell: Separate PCH in devicetree | Angel Pons |
| 2020-10-27 | mb/google/auron: Prepare devicetree for PCH split | Angel Pons |
| 2020-07-28 | broadwell: Factor out PIRQ routing from devicetree | Angel Pons |
| 2020-07-26 | mb/*/*/devicetree.cb: Normalize disabled PIRQ values | Angel Pons |
| 2020-04-03 | mb/google/auron: Add support for ACPI backlight controls | Matt DeVillier |
| 2020-04-03 | mb/google/auron: Convert variants to use override devicetree | Matt DeVillier |
| 2016-12-22 | Add/Combine Broadwell Chromebooks using variant board scheme | Matt DeVillier |
| 2015-06-13 | google/auron: Add mainboard | Marc Jones |
| 2015-06-10 | google/auron: Add initial mainboard copy from Peppy | Marc Jones |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |