coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-11-21	mb/google/asurada: Get RAM code from ADC 3	Yidi Lin
2020-11-18	mb/google/asurada: Configure pins mode for SD	Wenbin Mei
2020-11-18	mb/google/asurada: Implement enable_regulator and regulator_is_enabled	Yidi Lin
2020-11-18	mb/google/asurada: Implement board-specific regulator controls	Yidi Lin
2020-11-18	soc/mediatek/mt8192: add pmic MT6359P driver	Hsin-Hsiung Wang
2020-10-28	mb/google/asurada: Pass reset gpio parameter to BL31	CK Hu
2020-10-28	mb/google/asurada: Configure pinctrl for SD and MMC	Wenbin Mei
2020-10-26	mb/google/asurada: fix EC commands timeout	Hung-Te Lin
2020-10-22	mb/google/asurada: Add Chrome OS GPIOs	Hung-Te Lin
2020-10-22	mb/google/asurada: enable SPI devices	Nicolas Boichat
2020-10-20	mb/google/asurada: Init dram in romstage	Huayang Duan
2020-10-12	mb/google/asurada: Add USB support	CK Hu
2020-09-10	mb/google/asurada: Add config for hayato	Yu-Ping Wu
2020-09-02	src: Drop redundant 'select BOOTBLOCK_CONSOLE'	Elyes HAOUAS
2020-08-26	mb/google/asurada: Load dram params from sdram config	Huayang Duan
2020-08-21	mb/google/asurada: Fixup BOOT_DEVICE_SPI_FLASH_BUS default value	CK Hu
2020-08-13	mb/google/asurada: Add new MT8192 mainboard "Asurada"	CK Hu