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Configure GPIO CAM_PDN5 (AP_XHCI_INIT_DONE) as output, so that
payloads (for example depthcharge) can assert it to notify EC to enable
USB VBUS.
BUG=b:187149602
TEST=emerge-asurada coreboot
BRANCH=asurada
Change-Id: I3bf63f91b8057e35be2780024a8b398c3044729b
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54902
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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- Turns audio-related things power on.
- Selects I2S pin-muxing.
- Exposes GPIO "speaker enable" for switching on and off.
BUG=b:176856418
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: If595657bbddad85bc9a154b3648bae1190cb00b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Add the Chrome OS specific GPIOs (WP, EC, H1, ...) GPIOs.
BUG=None
TEST=emerge-asurada coreboot; # also boots into emmc
BRANCH=None
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Change-Id: Ieeeee88a09ae4c3af15e2ae93a29684d30dde493
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46386
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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